Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2011-07-05
2011-07-05
Farrokh, Hashem (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S154000
Reexamination Certificate
active
07975103
ABSTRACT:
A method for optimized data record verification when processing data-chained channel control words that span a single count field is provided. The method includes reading a first portion of a count field into a sequence buffer memory buffer and a store count field buffer. The first portion of the count field is copied to a local memory location. A first starting offset based on a size of the first portion of the count field is determined. The first portion of the count field is read into a sequence buffer memory bit bucket. A second portion of the count field, beginning at the first starting offset, is read into the sequence buffer memory buffer and the store count field buffer. The second portion of the count field is copied from the store count field buffer into the local memory location.
REFERENCES:
patent: 5072378 (1991-12-01), Manka
patent: 5535372 (1996-07-01), Benhase et al.
patent: 5900009 (1999-05-01), Vishlitzky et al.
Marwood, Jr. James D.
Yusufov Roman
Farrokh Hashem
Griffiths & Seaton PLLC
International Business Machines - Corporation
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