Method for operating a processor bus

Details Method for operating a processor bus Method for operating a processor bus

2002-03-28

2009-08-11

Knoll, Clifford H (Department: 2111)

Electrical computers and digital data processing systems: input/

Intrasystem connection

System configuring

C710S240000, C710S313000, C710S117000

Reexamination Certificate

active

07574543

ABSTRACT:
A method of operating a processor bus, with which a central unit (processor) makes accesses to various peripheral units, is described. The processor bus has the ability to change the order of the accesses as a function of the operating state of the peripheral units, and the peripheral units can either reject or delay the access.

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IEEE, p. 211, The design of easily scalable bus arbiters with different dynamic priority asssignment schemes.

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