Semiconductor device manufacturing: process – Gettering of substrate – By implanting or irradiating
Reexamination Certificate
1999-02-16
2001-08-14
Bowers, Charles (Department: 2813)
Semiconductor device manufacturing: process
Gettering of substrate
By implanting or irradiating
C438S458000, C438S473000, C438S474000, C118S7230ER
Reexamination Certificate
active
06274459
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to the manufacture of substrates. More particularly, the invention provides a technique including a method and device for introducing ions into a substrate for fabricating silicon-on-insulator wafers using a separating process in a cost effective and efficient manner.
Techniques have been proposed or used for the manufacture of silicon-on-insulator (“SOI”) wafers. One of these techniques is called “separation by implantation of oxygen,” commonly termed SIMOX. A detailed description of this process is described in Stanley Wolf Ph.D., SILICON PROCESSING FOR THE VLSI ERA (Volume 2), pages 66-79, which are hereby incorporated by reference. This technique generally uses conventional beam-line ion implanters for introducing the oxygen into the silicon wafer.
A limitation with the conventional SIMOX process is generally the cost of the resulting wafer. This cost often stems from the long time needed to implant a sufficient dose of oxygen into the silicon wafer. Since ion implanters commonly represent one of the largest capital cost items in a fabrication facility, it is often difficult to allocate the implanter for use in the conventional SIMOX process, which is often used for a variety of other integrated circuit processing operations. Additionally, many fabrication facilities (e.g., integrated circuit and wafer) simply cannot afford purchasing additional ion implantation equipment due to its excessive cost. Accordingly, silicon-on-insulator wafers made using the conventional SIMOX process are often costly and generally take a long time to fabricate.
Another technique for fabricating silicon-on-insulator wafer is commonly termed Smart Cut™. This technique uses conventional beam-line ion implantation equipment to introduce hydrogen to a selected depth into a substrate. The substrate is bonded to an insulating layer overlying a bulk substrate to form a multi-layered substrate structure. The multi-layered substrate is introduced into a furnace to increase the global temperature of the entire substrate, which blisters off a portion of substrate material from the substrate at the selected depth, thereby leaving a thin film of substrate material on the insulating material to form the silicon-on-insulator wafer. U.S. Pat. No. 5,374,564, which is in the name of Michel Bruel (“Bruel”), and assigned to Commissariat a l'Energie Atomique in France, describes this technique.
Unfortunately, the use of conventional beam line ion implantation equipment is quite expensive. In fact, the Smart Cut™ process generally requires large doses of hydrogen, which often takes a long time to implant. Additionally, the long time necessary to implant hydrogen by the implanter generally increases processing costs, which produces a higher cost wafer. Furthermore, the conventional beam line implanter often represents one of the highest equipment costs in a fabrication facility, which adds to the cost of producing the wafer. Numerous other limitations also exist with the use of the conventional beam line ion implantation equipment. Techniques have been proposed to use non-mass separated processes for implanting substrates. These techniques include, among others, plasma immersion ion implantation (“PIII”), ion shower, and the like. These techniques generally use a “chamber” process for introducing particles into substrate surfaces for the purposes of implantation. Unfortunately, these chamber processes often produce non-uniform implant profiles, which are undesirable for some applications such as those noted above.
From the above, it is seen that a technique for fabricating a substrate which is cost effective and efficient is often desirable.
SUMMARY OF THE INVENTION
According to the present invention, an improved technique for implanting substrates in the manufacture of substrates is provided. In particular, the present invention uses a plasma immersion ion implantation (“PIII”) process for introducing ions into a silicon wafer for fabricating a silicon-on-insulator substrate. The invention also can be applied to almost any application for removing a film(s) of material from a substrate.
In a specific embodiment, the present invention provides a method for implanting a substrate using a plasma processing apparatus. The method includes providing a substrate (e.g., wafer, panel) on a face of a susceptor. The substrate has an exposed face, which has a substrate diameter that extends from a first edge of the substrate to a second edge of the substrate across a length of the substrate. The method also includes forming a plasma sheath around the face of the substrate. The plasma sheath has a dark space distance that extends in a normal manner from the exposed face to an edge of the plasma sheath. The dark space distance and the substrate diameter comprise a ratio between the dark space distance and the substrate diameter. The ratio is about one half and less, which provides a substantially uniform implant. The ratio is substantially constant within the entire substrate, which extends along the substrate diameter. In some embodiments, however, the ratio is substantially constant along all portions of the substrate except for edges of the substrate. The implant is performed by placing a voltage potential (e.g., 10 KeV, 20 KeV, 50 KeV, 80 KeV) between the plasma and the substrate, which accelerates the charged particles into the substrate to a selected depth.
Numerous benefits are achieved by way of the present invention over preexisting techniques. In particular, the present invention relies upon a PIII system which can easy introduce ions into a substrate in a relatively timely process. The PIII process is often significantly faster than conventional implanters, e.g., beam line. Additionally, the PIII process can be readily incorporated into conventional fabrication facilities in an efficient and cost effective manner. The present invention also provides selected process parameters that greatly enhance uniformity for PIII applications that require such uniformity. Depending upon the embodiment, one or more of these benefits can be achieved.
The present invention achieves these benefits and others in the context of known process technology. However, a further understanding of the nature and advantages of the present invention may be realized by reference to the latter portions of the specification and attached drawings.
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Bowers Charles
Silicon Genesis Corporation
Smoot Stephen W.
Townsend and Townsend / and Crew LLP
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