Method for monitoring an internal control signal of a memory...

Details Method for monitoring an internal control signal of a memory... Method for monitoring an internal control signal of a memory...

2004-11-30

2008-11-11

Chaudry, M. Mujtaba K (Department: 2112)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Skew detection correction

C365S194000

Reexamination Certificate

active

07451360

ABSTRACT:
Disclosed is a method for monitoring an internal control signal of a memory device and an apparatus therefore. The method includes (a) generating a first signal having a first pulse width by a burst operation command, (b) receiving the first signal, and generating N−1 (where, N is a burst length) second signals having a second pulse width, (c) receiving the first signal and the second signals, and outputting a third signal by changing the first pulse width of the first signal and the second pulse width of the second signals in accordance with a variation of a frequency of a clock signal of the memory device, (d) outputting the third signal to an external pin of the memory device and monitoring the third signal, and (e) adjusting a pulse width of a signal that controls an operation of a data bus connecting a bit-line sense amplifier and a data sense amplifier using the third signal.

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