Method for modeling noise emitted by digital circuits

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000, C716S030000, C703S002000, C703S014000

Reexamination Certificate

active

06938224

ABSTRACT:
A method of predicting the electromagnetic noise emitted by a digital circuit on an integrated circuit is disclosed. In accordance with the illustrative embodiment, the output of each digital circuit element in the digital circuit is considered as a bit stream. All of these bits streams are, in aggregate, considered as a noise source that is characterized by a power spectral density, S(ω). The effect of the noise source on an analog circuit can be modeled as a lumped circuit, wherein the lumped circuit contains a noise source that represents the digital circuit; a multi-port network, also referred to as a lumped element, that represents that portion of the substrate between the digital circuit and the analog circuit; and a multi-port network that represents the analog circuit.

REFERENCES:
patent: 3906174 (1975-09-01), Dotter, Jr.
patent: 4247815 (1981-01-01), Larsen et al.
patent: 4421002 (1983-12-01), Deutsch
patent: 5196920 (1993-03-01), Kumamoto et al.
patent: 5475255 (1995-12-01), Joardar et al.
patent: 5481484 (1996-01-01), Ogawa et al.
patent: 5640161 (1997-06-01), Johnson et al.
patent: 5854600 (1998-12-01), Johnson et al.
patent: 5864311 (1999-01-01), Johnson et al.
patent: 5872531 (1999-02-01), Johnson et al.
patent: 5999714 (1999-12-01), Conn et al.
patent: 6075770 (2000-06-01), Chang et al.
patent: 6090151 (2000-07-01), Gehman et al.
patent: 6111470 (2000-08-01), Dufour
patent: 6135649 (2000-10-01), Feldmann et al.
patent: 6137841 (2000-10-01), Velez et al.
patent: 6234658 (2001-05-01), Houldsworth
patent: 6304991 (2001-10-01), Rowitch et al.
patent: 6330375 (2001-12-01), Fishman et al.
patent: 6385565 (2002-05-01), Anderson et al.
patent: 6405349 (2002-06-01), Gehman et al.
patent: 6424022 (2002-07-01), Wu et al.
patent: 6523154 (2003-02-01), Cohn et al.
patent: 6586292 (2003-07-01), Wu et al.
patent: 6671663 (2003-12-01), Hellums et al.
patent: 2002/0046371 (2002-04-01), Halter
patent: 2002/0164851 (2002-11-01), Wu et al.
patent: 2003/0154064 (2003-08-01), Gauthier et al.
Chang et al. “Fully differential current-input CMOS amplifier tront-end suppressing mixed signal substrate noise for optoelectronic applications” Circuits and Systems ISCAS Proceedings of the 1999 IEEE International Symposium vol. 1 30 May 1999 Pg 327-30.
Xu et al. “Measuring and modeling the effects of substrate noise on the LNA for a CMOS GPS receiver” IEEE journal of solid-state circuits vol. 36 no. 3 Mar. 2001 Pg. 473-485.
Heijningen et al. “Substrate noise generation in complex digital system: efficient modeling and simulation methodogy and experimental verification” Digest of technical papers Solid state circuits conference )-7803-6608-5 IEEE 2001.Pg. 22.1.
Makie-Fukuda “Substrate noise measurement by using noise-selective voltage comparators in analog and digital mixed-signal integrated circuits” IEEE Trans. on instrumetation and measurement vol. 48 No. 6 Dec. 1999 Pg. 1068-72.
M. Van Heijningen et al. “Analysis and experimental verification of digital substrate noise generation for epi-type substrate” IEEE Journal of solid-state circuit vol. 35 no. 7 Jul. 2000 p. 1002-1008.
Chang et al.“Parameterized spice subcircuits for multilevel interconnect modeling and simulation” IEEE Trans. on circuits and systems II vol. 39 No. 11 Nov. 1992 p. 779-789.
Vernotte et al. “A new method of measuring of the different types of noise altering the output signal of Oscillators” IEEE Trans. on Instrument. and measur. vol. 42 no. 6 Dec. 1993 p. 968-975.
Verghese et al. “Rapid simulation of substrate coupling effects in mixed-mode IC's” IEEE custom integrated circuits conf. 1993 Pg. 18.3.1-18.3.4.
Verghese et al. “Verification of rf and mixed-signal integrated circuits for substrate coupling effects” IEEE 1997 custom integrated circuits conference 16.1.1-16.1.8.
Su. et al. “Experimental resuts and modeling techniques for substrate noise in mixed-signal integrated circuits” IEEE journal of solid-state circuits vol. 28 no. 4 Apr. 1992 p. 420-430.
Stanisic et al. “Addressing substrate coupling in mixed-mode ic's: simulation and power distribution synthesis” IEEE journal of solid-state circuits vol. 29 no. 3 Mar. 1994 p. 226-238.

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