Method for mitigating imprint in a ferroelectric memory

Static information storage and retrieval – Systems using particular element – Ferroelectric

Reexamination Certificate

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Details

C365S049120, C365S049130, C365S065000, C365S102000, C365S117000, C365S149000, C365S230060

Reexamination Certificate

active

08081500

ABSTRACT:
An array of ferroelectric memory cells that allows imprint mitigation includes ferroelectric memory cells respectively coupled to word lines, plate lines, and bit lines; a word line driver for driving the word lines; a plate line driver for driving the plate lines; a bit line driver for driving the bit lines; and an isolation device driver for driving isolation devices coupled between the bit lines and a plurality of bit lines. The method for mitigating imprint includes coupling the bit lines to a respective plurality of sense amplifiers, turning on a word line and pulsing a plate line associated with a row of ferroelectric memory cells, disconnecting the bit lines from the respective sense amplifiers, driving the plate line low and the bit lines high, driving the plate line high and the bit lines low, driving the plate line low and floating the bit lines, driving the bit lines with the sense amplifier, and turning off the word line and precharging the bit lines. The method can be performed after each memory access, or can be performed whenever convenient with a counter and a rejuvenate command.

REFERENCES:
patent: 5525528 (1996-06-01), Perino et al.
patent: 5661730 (1997-08-01), Mitra et al.
patent: 5745403 (1998-04-01), Taylor
patent: 5777921 (1998-07-01), Takata et al.
patent: 5912846 (1999-06-01), Taylor
patent: 6008659 (1999-12-01), Traynor
patent: 6459609 (2002-10-01), Du
patent: 6590798 (2003-07-01), Komatsuzaki
patent: 6650158 (2003-11-01), Eliason
patent: 6894549 (2005-05-01), Eliason
patent: 7116572 (2006-10-01), Sun et al.
patent: 7176824 (2007-02-01), Du et al.
patent: 7271744 (2007-09-01), Du et al.
patent: 7313010 (2007-12-01), Sun et al.
patent: 2006/0098470 (2006-05-01), Sun et al.
patent: 2008/0180984 (2008-07-01), Takashima et al.
patent: 2009/0089489 (2009-04-01), Mukaida et al.
patent: 2009/0231903 (2009-09-01), Ogiwara et al.
European Search Report, Application No. 10157634.6-1233/2237280, mailed Oct. 20, 2010, 7 pages.

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