Method for microfabricating structures using...

Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal – Physical stress responsive

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S456000

Reexamination Certificate

active

06946314

ABSTRACT:
The invention provides a general fabrication method for producing MicroElectroMechanical Systems (MEMS) and related devices using Silicon-On-Insulator (SOI) wafer. The method includes providing an SOI wafer that has (i) a handle layer, (ii) a dielectric layer, and (iii) a device layer, wherein a mesa etch has been made on the device layer of the SOI wafer, providing a substrate, wherein a pattern has been etched onto the substrate, bonding the SOI wafer and the substrate together, removing the handle layer of the SOI wafer, removing the dielectric layer of the SOI wafer, then performing a structural etch on the device layer of the SOI wafer to define the device.

REFERENCES:
patent: 3922705 (1975-11-01), Yerman
patent: 4079508 (1978-03-01), Nunn
patent: 5488012 (1996-01-01), McCarthy
patent: 5501893 (1996-03-01), Laermer et al.
patent: 5760443 (1998-06-01), McCarthy
patent: 6077721 (2000-06-01), Fukada et al.
patent: 6105427 (2000-08-01), Stewart et al.
patent: 6171881 (2001-01-01), Fujii
patent: 6252294 (2001-06-01), Hattori
patent: 6277666 (2001-08-01), Hays et al.
patent: 6291875 (2001-09-01), Clark et al.
patent: 6423563 (2002-07-01), Fukada
patent: 6431714 (2002-08-01), Sawada et al.
patent: 6433401 (2002-08-01), Clark et al.
patent: 6458615 (2002-10-01), Fedder et al.
Moore DF, “Silicon-on insulator material for sensors and accelerometers” Silicon Fabricated Inertial instruments, 9/1-9/5 (Dec. 1996).
Syms RRA et al., “Surface tension powered self-assembly of 3D MOEMS devices using DRIE of bonded silicon-on-insulator wafers.” IEEE Seminar on Demonstrated Micromachining Technologies for Industry, 1/1-1/6 (Mar. 2000).
Yamamoto T et al. “Capacitive accelerometer with high aspect ratio single crystalline silicon microstructure using SOI structure with polysilicon-based interconnect technique.” Micro Electro Mechanical Systems, 515-519 (Jan. 2000).
Martin A. Schmidt, “Wafer-to-Wafer Bonding for Microstructure Formation”, Proceedings of the IEEE, vol. 86, No. 8, Aug. 1998.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method for microfabricating structures using... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for microfabricating structures using..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for microfabricating structures using... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3424097

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.