Method for measuring the current leakage of a dynamic random acc

Details Method for measuring the current leakage of a dynamic random acc Method for measuring the current leakage of a dynamic random acc

1996-05-06

1997-08-19

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Testing

371 211, G11C 700

Patent

active

056595115

ABSTRACT:
A method of measuring the leakage current of a DRAM capacitive junction involves the of following steps: A DRAM memory is formed on a semiconductor substrate. The DRAM memory comprises a plurality of RAM memory cells and a measuring memory cell. Each of the RAM memory cells and the measuring memory cell includes a transistor and a capacitor serially connected. The contact area of a bottom plate of the capacitor of the measuring memory cell is much larger than that of the RAM memory cells. A first junction leakage current value is measured while the transistor of the measuring memory cell is turned off. A second junction leakage current value is measured while the transistor of the measuring memory cell is turned on. The first junction leakage current value then is subtracted from the second junction leakage current value. By dividing the difference by the contact are of the bottom plate of the capacitor of the measuring memory cell, the capacitive junction leakage current value per unit area of the DRAM is obtained.

REFERENCES:
patent: 5317532 (1994-05-01), Ochii
patent: 5414668 (1995-05-01), Nakashima et al.
patent: 5432745 (1995-07-01), Tomita et al.
patent: 5459684 (1995-10-01), Nakamura et al.

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