Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis
Reexamination Certificate
2007-09-25
2007-09-25
Lee, Thomas (Department: 2115)
Electrical computers and digital processing systems: support
Clock, pulse, or timing signal generation or analysis
Reexamination Certificate
active
10808145
ABSTRACT:
Method for measuring and compensating skews of data transmission lines connecting at least one data transmission device with a data reception device via a parallel data bus comprising for each data transmission line the following steps: measuring the relative time delay of the data transmission line by transmitting a determined sequence of measurement vectors (MV) each consisting of an alternating bit pattern via said data transmission line, wherein the bit alternation frequency is halfed with every transmitted measurement vector (MV); comparing the received measurement vectors (MV′) transmitted via said data transmission line with corresponding reference vectors (RV) stored in said data reception device; shifting the received measurement vectors by inserting data unit intervals (UI) until a received measurement vector (MV′) matches a corresponding reference vector (RV); calculating a relative skew of the data transmission line depending of the number of inserted data unit intervals (UI) with respect to a slowest data transmission line; and compensating the calculated relative skew of the data transmission line by means of delay elements switched in response to the calculated relative skew.
REFERENCES:
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patent: 6820234 (2004-11-01), Deas et al.
patent: 6907552 (2005-06-01), Collins
patent: 2003/0046618 (2003-03-01), Collins
patent: 2003/0112827 (2003-06-01), Cox et al.
Infineon - Technologies AG
Jenkins Wilson Taylor & Hunt, P.A.
Lee Thomas
Weinman Sean
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