Method for masking conducting layers to abate charge damage duri

Details Method for masking conducting layers to abate charge damage duri Method for masking conducting layers to abate charge damage duri

1996-09-27

1999-02-02

Niebling, John F.

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

438597, 438669, 438926, H01L 213065, H01L 21027

Patent

active

058664823

ABSTRACT:
A method for forming within an integrated circuit a patterned conductor layer from a blanket conductor layer through a plasma etch method, where there is simultaneously avoided plasma induced electrical discharge damage to an integrated circuit structure formed beneath the blanket conductor layer. There is first provided a substrate. There is then formed over the substrate an integrated circuit structure. There is then formed over the substrate and the integrated circuit structure a blanket conductor layer. There is then formed upon the blanket conductor layer a patterned photoresist layer, where the patterned photoresist layer simultaneously: (1) leaves unexposed a first portion of the blanket conductor layer sufficiently large, and (2) leaves exposed a second portion of the blanket conductor layer sufficiently small, to limit plasma induced electrical discharge damage to the integrated circuit structure when the blanket conductor layer is patterned to form a patterned conductor layer through a plasma etch method. Finally, there is etched through the plasma etch method while employing the patterned photoresist layer as an etch mask layer the blanket conductor layer to form the patterned conductor layer.

REFERENCES:
patent: 5049514 (1991-09-01), Mori
patent: 5393701 (1995-02-01), Ko et al.
patent: 5441915 (1995-08-01), Lee
patent: 5767006 (1998-06-01), Lee
patent: 5770518 (1998-06-01), Shen

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