Method for manufacturing underlying pattern of semiconductor...

Details Method for manufacturing underlying pattern of semiconductor... Method for manufacturing underlying pattern of semiconductor...

2006-08-29

2010-02-02

Nguyen, Khiem D (Department: 2823)

Semiconductor device manufacturing: process

Chemical etching

Combined with coating step

C438S717000, C257SE21026, C257SE21232

Reexamination Certificate

active

07655568

ABSTRACT:
Disclosed herein is a method for manufacturing a semiconductor device that includes performing an O2plasma treatment step after forming a Si-containing photoresist film.

REFERENCES:
patent: 5186788 (1993-02-01), Hashimoto et al.
patent: 5667940 (1997-09-01), Hsue et al.
patent: 6140023 (2000-10-01), Levinson et al.
patent: 6534414 (2003-03-01), Wang et al.
patent: 6586339 (2003-07-01), Plat et al.
patent: 6916749 (2005-07-01), Tsujita et al.
patent: 6969580 (2005-11-01), Minami
patent: 6994945 (2006-02-01), Takeda et al.
patent: 04-176123 (1992-06-01), None
patent: 10-1998-028362 (1998-07-01), None
patent: 10-1999-0061090 (1999-07-01), None
patent: 10 2005 011910 (2005-12-01), None
Official action in counterpart application KR 10 2006 0069760, issued Oct. 23, 2007 (including English translation thereof).
Translation of Office Action for corresponding Taiwanese Application No. 095131538, dated Jun. 8, 2009.

Affiliated with

Also associated with

Rating

Method for manufacturing underlying pattern of semiconductor... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for manufacturing underlying pattern of semiconductor..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for manufacturing underlying pattern of semiconductor... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4189226