Method for manufacturing thin film transistor display array...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

Reexamination Certificate

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C257SE21094, C257SE21104, C257SE21121, C257S227000, C257S443000, C438S128000, C438S618000

Reexamination Certificate

active

07638371

ABSTRACT:
A method for manufacturing a thin film transistor (“TFT”) array includes providing a substrate, a patterned first metal layer on the substrate including a plurality of first conductive lines and a plurality of second conductive lines disposed orthogonal to the first conductive lines, an insulating layer over the patterned first metal layer, a patterned silicon layer, a patterned passivation layer over the patterned silicon layer, and a patterned doped silicon layer and a patterned second metal layer over the patterned passivation layer, filling exposed portions of the patterned silicon layer and exposed portions of the first conductive lines and the second conductive lines, where the patterned second metal layer includes a plurality of third conductive lines and a plurality of fourth conductive lines, each of which corresponding respectively to one of the plurality of first conductive lines and the plurality of second conductive lines.

REFERENCES:
patent: 4938567 (1990-07-01), Chartier
patent: 6642979 (2003-11-01), Choo et al.
patent: 2003/0148561 (2003-08-01), Nakajima
patent: 2005/0073619 (2005-04-01), Chen et al.
patent: 2005/0253249 (2005-11-01), Chen et al.

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