Method for manufacturing SOI substrate using cluster ion

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Total dielectric isolation

Reexamination Certificate

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C438S458000, C257SE21567

Reexamination Certificate

active

07989305

ABSTRACT:
A method is demonstrated to manufacture SOI substrates with high throughput while resources can be effectively used. The present invention is characterized by the feature in which the following process A and process B are repeated. The process A includes irradiation of a surface of a semiconductor wafer with cluster ions to form a separation layer in the semiconductor wafer. The semiconductor wafer and a substrate having an insulating surface are then overlapped with each other and bonded, which is followed by thermal treatment to separate the semiconductor wafer at or around the separation layer. A separation wafer and an SOI substrate which has a crystalline semiconductor layer over the substrate having the insulating surface are simultaneously obtained by the process A. The process B includes treatment of the separation wafer for reusing, which allows the separation wafer to be successively subjected to the process A.

REFERENCES:
patent: 5374564 (1994-12-01), Bruel
patent: 5892235 (1999-04-01), Yamazaki et al.
patent: 6027988 (2000-02-01), Cheung et al.
patent: 6127702 (2000-10-01), Yamazaki et al.
patent: 6245645 (2001-06-01), Mitani et al.
patent: 6271101 (2001-08-01), Fukunaga
patent: 6335231 (2002-01-01), Yamazaki et al.
patent: 6344404 (2002-02-01), Cheung et al.
patent: 6362076 (2002-03-01), Inazuki et al.
patent: 6372609 (2002-04-01), Aga et al.
patent: 6380046 (2002-04-01), Yamazaki
patent: 6388652 (2002-05-01), Yamazaki et al.
patent: 6468923 (2002-10-01), Yonehara et al.
patent: 6534380 (2003-03-01), Yamauchi et al.
patent: 6548382 (2003-04-01), Henley et al.
patent: 6596610 (2003-07-01), Kuwabara et al.
patent: 6602761 (2003-08-01), Fukunaga
patent: 6686623 (2004-02-01), Yamazaki
patent: 6778164 (2004-08-01), Yamazaki et al.
patent: 6803264 (2004-10-01), Yamazaki et al.
patent: 6875633 (2005-04-01), Fukunaga
patent: 6927148 (2005-08-01), Ito
patent: 7064049 (2006-06-01), Ito et al.
patent: 7119365 (2006-10-01), Takafuji et al.
patent: 7176525 (2007-02-01), Fukunaga
patent: 7256776 (2007-08-01), Yamazaki et al.
patent: 7442623 (2008-10-01), Endo et al.
patent: 2001/0046746 (2001-11-01), Yokokawa et al.
patent: 2002/0157790 (2002-10-01), Abe et al.
patent: 2004/0104424 (2004-06-01), Yamazaki
patent: 2005/0009252 (2005-01-01), Yamazaki et al.
patent: 2005/0070073 (2005-03-01), Al-Bayati et al.
patent: 2005/0079712 (2005-04-01), Tong et al.
patent: 2006/0099776 (2006-05-01), Dupont
patent: 2006/0099791 (2006-05-01), Mitani et al.
patent: 2006/0148208 (2006-07-01), Popov et al.
patent: 2007/0063281 (2007-03-01), Takafuji et al.
patent: 2007/0108510 (2007-05-01), Fukunaga
patent: 2007/0148912 (2007-06-01), Morita et al.
patent: 2007/0148914 (2007-06-01), Morita et al.
patent: 2007/0148917 (2007-06-01), Morita et al.
patent: 2007/0173000 (2007-07-01), Yamazaki
patent: 2007/0184632 (2007-08-01), Yamazaki et al.
patent: 2007/0281399 (2007-12-01), Cites et al.
patent: 2007/0291022 (2007-12-01), Yamazaki et al.
patent: 2008/0153272 (2008-06-01), Akiyama et al.
patent: 2008/0233725 (2008-09-01), Forbes
patent: 2009/0081848 (2009-03-01), Erokhin et al.
patent: 10-162770 (1998-06-01), None
patent: 11-097379 (1999-04-01), None
patent: 11-307472 (1999-11-01), None
patent: 2000-012864 (2000-01-01), None
patent: 2000-124092 (2000-04-01), None
patent: 2004-087606 (2004-03-01), None
patent: 2005-252244 (2005-09-01), None
patent: 3943782 (2007-07-01), None
Lu et al. “Ion-cut silicon-on-insulator fabrication with plasma immersion ion implantation” Appl. Phys. Lett. 71 (19), Nov. 10, 1997.
Kriegler, R.J.; Cheng, Y.C.; Colton, D.R.; “The Effect of HCI and CI2 on the Thermal Oxidation of Silicon,” J. Electrochem. Soc., vol. 119, Issue 3, pp. 388-392, Mar. 1972.
Vossen, J.L; Kern, W.; “Thin film process II”, Academic Press, pp. 317-323, 1991.

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