Method for manufacturing SIMOX wafer

Details Method for manufacturing SIMOX wafer Method for manufacturing SIMOX wafer

2007-02-02

2010-10-05

Blum, David S (Department: 2813)

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Total dielectric isolation

C438S526000, C438S766000, C438S770000, C257SE21568

Reexamination Certificate

active

07807545

ABSTRACT:
A SIMOX wafer having a BOX layer with a thin film thickness is obtained without a reduction in productivity or deterioration in quality. In a method for manufacturing a SIMOX wafer comprising: a step of forming a first ion-implanted layer in a silicon wafer; a step of forming a second ion-implanted layer that is in an amorphous state; and a high-temperature heat treatment step of maintaining the wafer in an oxygen contained atmosphere at a temperature that is not lower than 1300° C. but less than a silicon melting point for 6 to 36 hours to change the first and the second ion-implanted layers into a BOX layer, a gas containing chlorine that is not less than 0.1 volume % but less than 1.0 volume % is mixed into an atmosphere during temperature elevation in the high-temperature heat treatment.

REFERENCES:
patent: 5707889 (1998-01-01), Hsu et al.
patent: 5930643 (1999-07-01), Sadana et al.
patent: 6784072 (2004-08-01), Fox et al.
patent: 6794264 (2004-09-01), Dolan et al.
patent: 7473614 (2009-01-01), Tolchinsky et al.
patent: 07-263538 (1995-10-01), None
English Language Abstract of JP 07-263538 (Oct. 13, 1995).
U.S. Appl. No. 11/677,282, filed Feb. 21, 2007, and entitled “Method for Manufacturing SIMOX Wafer”.
U.S. Appl. No. 11/695,706, filed Apr. 3, 2007, and entitled “Method for Manufacturing SIMOX Wafer and SIMOX Wafer Obtained by this Method”.

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