Semiconductor device manufacturing: process – Formation of semiconductive active region on any substrate – On insulating substrate or layer
Reexamination Certificate
2011-08-02
2011-08-02
Tran, Minh-Loan T (Department: 2826)
Semiconductor device manufacturing: process
Formation of semiconductive active region on any substrate
On insulating substrate or layer
C438S517000, C438S791000, C257S352000, C257S635000, C257S640000, C257SE21416, C257SE23016
Reexamination Certificate
active
07989324
ABSTRACT:
The present invention provides an SOS wafer comprising a non-transparent polysilicon layer provided on a back surface of a sapphire substrate, a silicon nitride layer which protects the polysilicon layer, and a stress relaxing film which cancels stress produced in the silicon nitride layer, wherein the silicon nitride layer and the stress relaxing film are provided on the back surface side.
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patent: 2004/0092051 (2004-05-01), Currie et al.
patent: 57-153445 (1982-09-01), None
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patent: 3083725 (2000-06-01), None
Cruz Leslie Pilar
Oki Semiconductor Co., Ltd.
Rabin & Berdo PC
Tran Minh-Loan T
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