Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support
Reexamination Certificate
1999-06-15
2001-03-27
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Metallic housing or support
C438S106000, C438S118000, C438S121000, C438S125000, C438S126000, C438S127000
Reexamination Certificate
active
06207478
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to a method for manufacturing a semiconductor device package, and more particularly for manufacturing a semiconductor package of a center pad type device.
2. Description of the Related Arts
New packaging technologies have emerged to meet the integration density and operation speed requirements of newly developed semiconductor devices. The new packaging technology includes the Ball Grid Array (BGA) package, the Chip Size Package (CSP) and the Fine Pitch Ball Grid Array (FPBGA) package. While all of these packages have a smaller footprint than conventional plastic packages, the footprint of the CSP and FPBGA packages can be as small as the size of the semiconductor chip.
FPBGA packages
10
and
20
are described with reference to
FIGS. 1 and 2
. As shown in
FIG. 1
, a semiconductor chip
11
is attached to a tape wiring substrate
15
. An elastomer
16
is interposed between semiconductor chip
11
and tape wiring substrate
15
. Tape wiring substrate
15
includes a polyimide film
13
having top and bottom surfaces, beam leads
14
formed on the bottom surface of polyimide film
13
, and terminal pads
4
which are extensions of beam leads
14
. Multiple via holes
17
, through which terminal pads
4
are exposed, are formed through polyimide film
13
. Metal balls
19
are attached to terminal pads
4
. Beam leads
14
are bonded to bonding pads
12
of semiconductor chip
11
. As a result, semiconductor chip
11
electrically connects to external electronics (not shown) through bonding pads
12
, beam leads
14
, terminal pads
4
, and metal balls
19
. Bonding parts between bonding pads
12
and beam leads
14
are encapsulated with a plolymer resin
18
.
The bonding pads of memory devices are typically arranged along the outer edges of the devices. The bonding pads of semiconductor chip
11
of FPBGA package
10
are arranged in this fashion.
To improve electrical performance and reduce the size of the chip, a center pad type memory device was created in which the bonding pads are disposed along a center line(s) of the device. The center pad type memory device requires a newly designed FPBGA package.
FPBGA package
20
of
FIG. 2
is an example of the FPBGA package designed for the center pad type device. As with FPBGA package
10
of
FIG. 1
, a semiconductor chip
21
is attached to a tape wiring substrate
25
. An elastomer
26
is interposed between semiconductor chip
21
and tape wiring substrate
25
. Via holes
27
are formed through the tape wiring substrate
25
. Beam leads
24
a
of tape wiring substrate
25
bond to bonding pads
22
of semiconductor chip
21
. Metal balls
29
are attached to respective terminal pads
24
b
exposed through via holes
27
. Although FPBGA package
20
looks similar to FPBGA package
10
, FPBGA package
20
presents some technical problems not found in FPBGA package
10
.
Encapsulation of edge encapsulation area
28
a
is performed by the same method as the encapsulation of FPBGA package
10
. Before solder balls
29
are attached to terminal pads
24
b
, a cover film (not shown) is attached to the top surface of tape wiring substrate
25
. Tape wiring substrate
25
and chip
21
are turned upside down such that the cover film is under tape wiring substrate
25
. A liquid encapsulant is then dispensed on tape wiring substrate
25
along the perimeter of semiconductor chip
21
to encapsulate edge encapsulation area
28
a
. Encapsulation of a center encapsulation area
28
b
is performed after turning over the tape wiring substrate
25
and removing the cover film.
The encapsulation process of FPGBA package
20
is long and complicated, and, consequently, increases manufacturing costs. Because encapsulation area
28
b
may trap an air pocket and the void of the air pocket may result in a crack in the packaging, the encapsulation process decreases the FPGBA package's reliability.
SUMMARY OF THE INVENTION
In accordance with an embodiment of the present invention, a method for manufacturing a semiconductor package of a center pad type device includes: a semiconductor chip with bonding pads along a center line of its active surface; attaching the semiconductor chip to a tape wiring substrate having multiple beam leads; interposing an elastomer between the semiconductor chip and the tape wiring substrate; bonding the beam leads to the respective bonding pads which are exposed through an opening of the elastomer; and encapsulating the opening and perimeter of the semiconductor chip with a liquid encapsulant. The tape wiring substrate includes both a number of terminal pads, which are extensions of the beam leads, and via holes through which the terminal pads are exposed. After the encapsulation, metal balls are attached to the terminal pads.
The method may use a cover film. When the cover film is used, there are two techniques for encapsulating the elastomer's opening. Using one technique, an encapsulant is dispensed on a portion of tape wiring substrate that is close to one end of the opening. The encapsulant is dispensed along the semiconductor chip's perimeter. Using the second technique, the cover film includes a number of air vents. The encapsulant is dispensed at both ends of the opening and along the semiconductor chip's perimeter.
In both techniques, the encapsulation may be performed in a vacuum. It is preferable that the encapsulant have a viscosity of about 60 to 130 poises.
When the cover film is not used, an encapsulant is dispensed in the opening of the elastomer through an opening of the tape wiring substrate. The tape wiring substrate is then turned upside down, and the encapsulant is dispensed along the semiconductor chip's perimeter. It is preferable that the encapsulant be first-cured after filling the opening and be second-cured after filling the perimeter of the semiconductor chip.
In order to produce a number of semiconductor packages simultaneously, a base substrate including multiple tape wiring substrates can be fixed to a frame and undergo the methods described above. In a final step, the tape wiring substrate is separated to produce individual semiconductor packages.
REFERENCES:
patent: 6103554 (2000-08-01), Son et al.
Chung Myung Kee
Hong In Pyo
Jin Ho Tae
Lee Jin Soon
Millers David
Niebling John F.
Samsung Electronics Co,. Ltd.
Skjerven Morrill & MacPherson LLP
Zarneke David
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