Method for manufacturing semiconductor memory device having land

Details Method for manufacturing semiconductor memory device having land Method for manufacturing semiconductor memory device having land

1995-10-30

1997-04-22

Tsai, Jey

Semiconductor device manufacturing: process

Making passive device

Stacked capacitor

438701, H01L 2170, H01L 2700

Patent

active

056228830

ABSTRACT:
In manufacturing a high-integrated semiconductor memory device, there is disclosed a method for forming a trophy-shaped landing pad to a contact hole with a high aspect ratio by using a multiple-step etching process. According to the present invention, a storage node landing pad is formed by the multiple-step etching process and in different profiles via different etching processes from a bit line landing pad, thereby preventing a stringer or a bridge phenomenon occurring between the landing pads. Moreover, the trophy-shaped landing pad is formed by the multiple-step etching process, thereby securing an enough alignment margin and facilitating the manufacturing of 1 Gbit-grade DRAM by lowering the aspect ratio.

REFERENCES:
patent: 4857141 (1989-08-01), Abe et al.
patent: 5026666 (1991-06-01), Hills et al.
patent: 5248628 (1993-09-01), Okabe et al.
patent: 5292677 (1994-03-01), Dennison

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