Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2006-08-01
2006-08-01
Quach, T. N. (Department: 2826)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S633000, C438S648000, C257SE21159
Reexamination Certificate
active
07084055
ABSTRACT:
It is desirable to prevent breakage and separation of wiring of a semiconductor integrated circuit device, such as a bit-line of a DRAM. To accomplish this, disclosed is a method in which, e.g., a high density plasma silicon oxide film is deposited on wirings (e.g., a bit-line that is connected to the source and drain region of a memory cell selection MISFET of a DRAM memory cell) by means of a high density plasma CVD technique, at a first temperature, and the structure is subjected to RTA (heat treatment) at a second temperature higher than the first temperature (e.g., 750° C.). Via holes are then formed in the high density plasma silicon oxide film, and first and second conductive films are then formed, the first conductive film being formed in the via holes and at a third temperature lower than the first temperature. The first and second conductive layers are then polished to remain selectively within the via holes. In heat treating the high density plasma silicon oxide film, the temperature is raised from the first temperature to the second temperature at a maximum speed of 60° C./second or less.
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Asaka Katsuyuki
Fujiwara Tsuyoshi
Hoshino Yoshinori
Nariyoshi Yasuhiro
Oomori Kazutoshi
Hitachi , Ltd.
Hitachi Tohbu Semiconductor, Ltd.
Hitachi ULSI Systems Co. Ltd.
Quach T. N.
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