Method for manufacturing semiconductor devices, and method...

Radiation imagery chemistry: process – composition – or product th – Radiation modifying product or process of making – Radiation mask

Reexamination Certificate

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C430S030000, C430S313000, C430S314000, C430S315000, C430S316000

Reexamination Certificate

active

07662522

ABSTRACT:
A method for manufacturing a semiconductor device includes calculating a correction amount for correcting a dimension error generated in a pattern, by using an area and a total length of sides of a perimeter of the pattern included in each grid region of a plurality of mesh-like grid regions made by virtually dividing a pattern creation region of an exposure mask, exposing the pattern whose dimension has been corrected by the correction amount onto a substrate on which a resist film is coated, developing the resist film after the exposing, and processing the substrate by using a resist pattern after the developing.

REFERENCES:
patent: 5863682 (1999-01-01), Abe et al.
patent: 2002/0051916 (2002-05-01), Ki
patent: 2007/0192757 (2007-08-01), Emi et al.
patent: 2003-43661 (2003-02-01), None
patent: 3469422 (2003-09-01), None
patent: 2004-048018 (2004-02-01), None
patent: 2005-195787 (2005-07-01), None
patent: 2007-150243 (2007-06-01), None
patent: 2007-249167 (2007-09-01), None
patent: 1998-071574 (1998-10-01), None
Takayuki Abe, et al., “Global Critical Dimension Correction: II”, Japanese Journal of Applied Physics, vol. 46, No. 6A, 2007, pp. 3368-3376.
Emile Sahouria, et al., “Pattern based mask process correction - impact on data quality and mask writing time,” Proceedings of SPIE, vol. 5853, 2005, pp. 564-573.
Jens Schneider, et al., “Compensation of long-range process effects on photomasks by design data correction,” Proceedings of SPIE, vol. 4889, 2002, pp. 59-66.

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