Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
1999-12-22
2002-03-19
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S638000, C438S704000
Reexamination Certificate
active
06358830
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and a method for manufacturing a semiconductor device.
2. Description of Related Art
An interlayer dielectric film used in manufacturing a semiconductor device may be composed of a plurality of films. Such an interlayer dielectric film is disclosed in Japanese Laid-open patent application HEI 4-218947. For example, an interlayer dielectric film may be composed of a base layer of a silicon oxide film, an SOG film disposed over the base layer, and a cap layer of a silicon oxide film disposed over the SOG film. The interlayer dielectric film may have a through hole formed therein. An internal wall of the through hole may be provided with a tapered section, such that a conductive film fills the through hole with good coverage.
In order to form the through hole having such a tapered shape, first, the interlayer dielectric film is selectively, isotropically etched, and the etching is stopped halfway. Due to the isotropic etching, the interlayer dielectric film is etched not only in a vertical direction, but also in a lateral direction. The closer to the upper surface of the through hole, the greater the through hole is etched in the lateral direction. As a result, the internal surface has a tapered section. Then, the etching is changed to an anisotropic etching to selectively etch the remaining interlayer dielectric film. By the steps described above, the through hole is completed.
It is noted that the etching speed for the SOG film is substantially greater than that for the cap layer. As a result, if the SOG film is isotropically etched, portions of the SOG film in the lateral direction are excessively etched. This creates recesses in the internal wall of the through hole.
Because of this reason, the isotropic etching is stopped in the cap layer, and thus the degree of freedom in conducting the isotropic etching is limited. As a consequence, for example, there are instances in which a conductive film may not fill a through hole having a relatively large aspect ratio.
SUMMARY OF THE INVENTION
It is an object of an embodiment of the present invention to provide a method for manufacturing a semiconductor device that improves the degree of freedom in isotropic etching and to provide a semiconductor device manufactured by the method.
In accordance with one embodiment of the present invention, a semiconductor device has a semiconductor substrate defining a main surface and an interlayer dielectric film located over the main surface, wherein the interlayer dielectric film includes a through hole having an upper surface section, a lower surface section and an internal surface having a tapered section between the upper surface section and the lower surface section.
In accordance with one embodiment of the present invention, the semiconductor memory device is manufactured by a method including at least the steps of: (a) reacting a silicon compound with hydrogen peroxide by a CVD method to form a first silicon oxide film that forms at least a part of the interlayer dielectric film; (b) reacting a silicon compound with at least oxygen or a compound including oxygen by a CVD method to form a second porous silicon oxide film that forms at least a part of the interlayer dielectric film and serves as a cap layer on the first silicon oxide film; and (c) selectively, isotropically etching the first silicon oxide film and the second silicon oxide film, to form a through hole that includes an internal surface having a tapered section, such that the through hole becomes smaller in a direction from the upper surface section toward the lower surface section.
A semiconductor device manufactured by a manufacturing method in accordance with one embodiment of the present invention has a semiconductor substrate defining a main surface and an interlayer dielectric film located over the main surface. The interlayer dielectric film includes a first silicon oxide film that is formed by reacting a silicon compound with hydrogen peroxide through a polycondensation reaction, and a second silicon oxide film that forms a cap layer and is located over the first silicon oxide film.
The interlayer dielectric film therefore includes a through hole that is formed in the first silicon oxide film and the second silicon oxide film and has an upper surface section, a lower surface section, and an internal surface between the upper surface section and the lower surface section. The internal surface includes a tapered section in such a manner that the through hole becomes smaller in diameter from the upper surface section toward the lower surface section.
In accordance with an embodiment of the present invention, the first silicon oxide film may be formed instead of an SOG film, in step (a). Preferably, the isotropic etching speed for the first silicon oxide film is the same or substantially the same as the isotropic etching speed for the second silicon oxide film. As a result, the first silicon oxide film can also be isotropically etched, and therefore, the degree of freedom in isotropic etching is improved.
The isotropic etching speed for the second silicon oxide film needs to be the same or substantially the same as the isotropic etching speed for the first silicon oxide film. The second silicon oxide film having such characteristics may be formed by a common CVD method, such as, for example, pyrolysis (thermal decomposition), and hydrolysis of a silane compound. The second silicon oxide film may be formed by a normal pressure CVD method, a plasma CVD method or a reduced pressure CVD method.
An impurity, such as, for example, phosphorous, boron or the like may preferably be added to the porous second silicon oxide film. More preferably, phosphorous is added to the second silicon oxide film. As a result the second silicon oxide film can relieve stresses by weakening the molecular bonding force between Si and O molecules of the silicon oxide that forms the film. As a result, the film becomes moderately soft and yet hard enough to be cracked. One of the roles of the second silicon oxide film is a function in which the impurity such as phosphorous contained in the silicon oxide film functions as a getter of mobile ions, such as alkali-ions that have deteriorating effects on the device element-reliability characteristics. The impurity concentration of the impurity contained in the second silicon oxide film may preferably be about 1-6 weight %, in consideration of the gettering function and the stress relieving function of the film.
Further, the second silicon oxide film has a function to prevent the first silicon oxide film from absorbing moisture. Also, the second silicon oxide film has an internal compression stress. Accordingly, when other films that form the interlayer dielectric film have internal tensile stresses, the second silicon oxide film alleviates the stresses and prevents the generation of cracks in the interlayer dielectric film.
A plasma CVD method for forming the second silicon oxide film may preferably be conducted with a high frequency at temperatures of about 300-450° C. This step is effective in disconnecting water content from the first silicon oxide film.
The compound including oxygen that is used to form the second silicon oxide film may be oxygen (O
2
). However, more preferably, nitrogen monoxide (N
2
O) may preferably be used as the compound including oxygen to form the second silicon oxide film. By the use of nitrogen monoxide as a reactant gas, the nitrogen monoxide in a plasma state likely reacts with a hydrogen bond (—H) of the silicon compound that forms the first silicon oxide film. As a result, disconnection of gasification components (hydrogen, water) from the first silicon oxide film is promoted even while the second silicon oxide film is being formed.
Alternatively, a normal pressure CVD method at temperatures of about 300-550° C. may be conducted to form the second silicon oxide film, instead of the plasma CVD method. In this case, ozone may be used as a compound including oxygen to f
Hogan & Hartson L.L.P.
Niebling John F.
Seiko Epson Corporation
Whitmore Stacy A
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