Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Total dielectric isolation
Reexamination Certificate
2002-03-18
2003-03-04
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Total dielectric isolation
Reexamination Certificate
active
06528388
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a method for manufacturing a semiconductor device, in which electric components are formed on a thin semiconductor layer of an SOI substrate, and to an ultrathin semiconductor device. In particular, it relates to a semiconductor device manufacturing method, which allows to form electric components on a very thin semiconductor layer, such as an SOI structure, without causing neither electric component destruction nor damage of oxidized layer due to the charging up by the plasma in the manufacturing process, and the present invention relates also to an ultrathin semiconductor device.
BACKGROUND OF THE INVENTION
Conventionally, semiconductor devices using SOI substrate have various advantages, such that the electric components can be isolated from each other without using p-n junctions, that the leak current is small and that the capacitance is small because electric components can be formed on a thin semiconductor layer disposed on an insulating layer, therefore, the operation speed of the semiconductor devices can be increased, and the degree of electric component integration can be increased. Thus, semiconductor devices using SOI substrate are used in high integrated semiconductor devices. Such semiconductor devices are manufactured using a wafer, which is prepared such that an isolating layer is formed between semiconductor layers as an SOI substrate.
Such an SOI substrate has been prepared by various methods, such as an combining method, oxygen implantation method, ELTRAN (Epitaxial Layer Transfer) method, and smart-cut method. In the combining (applying) method, two Si substrate are prepared; then an insulating layer, for example, SiO
2
, is formed on one of the two substrates; then they are applied to each other, and one of those Si substrates is ground to be thin. In the oxygen implantation method, oxygen ions are implanted up to a certain depth from the surface of a Si substrate so that an insulating layer, such as SiO
2
, is formed up to the depth from the surface.
In the ELTRAN method, a porous surface is formed on a Si substrate by an anode oxidization procedure, for example, then an epitxial semiconductor layer is grown on the porous surface. Another semiconductor substrate, on which an oxidized layer is formed, is combined (applied) on the surface of the epitaxial grown semiconductor layer of the former Si substrate, then the Si substrate portion is separated at the porous surface so that this portion is removed. And electric components are formed on the epitaxial grown semiconductor layer. In the smart-cut method, two substrates are prepared. Then, hydrogen ions are implanted into one of the substrates, and an oxidized layer is formed on the surface of the other substrate. Then they are applied to each other. After that, a heat treatment is undergone. The portion where hydrogen ions are implanted swells by the heat treatment so that the substrates are cut out at the portion.
In the process for manufacturing a semiconductor device using an SOI substrate, according to the prior art, as explained above, an SOI substrate is prepared previously before the so-called wafer process. Namely electric components are formed on a thin semiconductor layer, which is disposed on an insulating layer in the SOI substrate. This means that the thin semiconductor layer is electrically floating in the process, and the so-called charging up phenomenon occurs. The charging up phenomenon is a phenomenon that charges due to, for example, the plasma in the process of etching, CVD or ion implantation, accumulate in some portions. When an inverse electric field is formed by the accumulated charges, serious problems, such as destruction of the electric components or damages in the oxidized layer, will appear.
When such SOI substrate is not used, intrinsic gettering cites, which are called “IG (intrinsic gettering)”, are formed at a depth of over 20 micro meters from the surface of the semiconductor substrate
31
, as shown in FIG.
5
(
a
). The intrinsic gettering is a defect caused by precipitation of oxygen, and is also referred to “bulk macro defect (BMD)”. Impurities such as Fe, for example, or charges due to the implanted ions I/I are gettered by those gettering cites. When SOI substrate is used, however, the gettering cites IG are insulated by the oxidized layer
32
, thus the gettering cites IG can not getter the impurities, etc. And thickness of the semiconductor layer
33
disposed on the oxidized layer
32
is very thin, for example, 0.05 to 2 micro meters, as shown in FIG.
5
(
b
). Therefore no gettering cite cannot be formed therein. By the way, in FIGS.
5
(
a
) and
5
(
b
), reference numeral
34
denotes an electric component such as transistor and the reference numeral
35
denotes an insulating layer of the surface on the substrate
31
.
According to the manufacturing method of a semiconductor device using SOI substrate, in the prior art, though the thickness of the semiconductor layer itself disposed on an insulating layer is formed to be thin, only a semiconductor device having a thickness of over 30 micro meters can be obtained. Because such semiconductor device is formed either on a Si substrate, on which an insulating layer is formed, or on a sapphire substrate, on which a semiconductor layer is formed. Thus, even when the silicon substrate is ground to be thin, there is a limit to decrease the thickness, due to the difficulty in the thinning of the substrate after forming electric components on such thick substrate. Thus, no semiconductor device thinner than 30 micro meters is obtained using such SOI substrate so far now. Another problem is that such SOI substrate is not suitable for putting on a plurality of such semiconductor devices one over another so as to produce a three dimensional semiconductor device.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a manufacturing method of a semiconductor device using a SOI substrate, which allows to form electric components on a thin semiconductor substrate having SOI structure, while the electric components or the insulating layer are not influenced by the charging up phenomenon, which may appear in the manufacturing process.
Another object of the present invention is to provide an ultrathin semiconductor device having an insulating layer at its backside, the total thickness of which is under 20 micro meters, and which can be easily putted on (layered) one over another to form a three dimensional semiconductor device.
The method for manufacturing a semiconductor device is characterized by: (a) a step for forming a semiconductor substrate having a lacunose layer disposed at a equal depth from the surface of a semiconductor layer; (b) a step for forming electric components on the semiconductor layer at the surface side with respect to the lacunose layer; and (c) a step for separating the semiconductor substrate at the lacunose layer, after forming the electric components. An insulating layer is formed on the surface exposed by the separation of the semiconductor substrate at the lacunose layer, so that a semiconductor device having SOI structure is formed.
The lacunose layer in this description means a layer where the substrate can be easily separated into two parts. An example of a lacunose layer is, for example, a porous layer obtained by an anode oxidation of a silicon substrate. The substrate can be separated at the layer, by blasting a water jet or by N
2
gas. Another example is a hydrogen ion implanted layer. The substrate can be separated at the layer, by generating foam due to a heat treatment. The electric component in this description means electric elements forming a part of an electric circuit, which are formed on and/or in the semiconductor layer. Examples of the electric component are transistor, memory element, diode, resistor, capacitor and lines.
According to this method, though electric components can be formed on a thin layer as if they are formed on a conventional SOI substrate, the electric components forming process can be
Arent Fox Kintner Plotkin & Kahn
Le Thao P
Nelms David
Rohm & Co., Ltd.
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