Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Total dielectric isolation
Patent
1997-08-29
1999-08-17
Niebling, John F.
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Total dielectric isolation
438439, 438440, 438448, 438766, H01L 2176, H01L 2131, H01L 21469
Patent
active
059407158
ABSTRACT:
A semiconductor device manufacturing method capable of realizing a fine device isolation by stably suppressing the narrow channel effect and the reverse narrow channel effect in an N-channel MOS transistor. A patterned silicon nitride film 102 is formed, and after a P-type ion implanted layer 103 is formed, a field oxide film 105a is formed. In this process, re-distribution of the P-type impurity is caused by segregation, so that a P-type impurity concentration adjusting region 104a is formed at the surface of a P-type silicon substrate 101 in the proximity of a bird's beak of the field oxide film 105a.
REFERENCES:
patent: 3874919 (1975-04-01), Lehman
patent: 5550074 (1996-08-01), Lin
patent: 5700728 (1997-12-01), Kuo et al.
Jones Josetta
NEC Corporation
Niebling John F.
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