Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate
2005-05-05
2008-11-11
Chaudhari, Chandra (Department: 2891)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
C438S595000, C257SE21626
Reexamination Certificate
active
07449403
ABSTRACT:
Disclosed is a method for manufacturing a semiconductor device. According to such a method, in forming a MOSFET to which a double spacer structure is applied, a first spacer of an oxide film is formed after only an upper gate conductive layer is primarily patterned, and then a second spacer of a nitride film is formed after a lower gate conductive layer is etched, so that impurities cannot be diffused up to into the semiconductor substrate through PLDs existing within the oxide film because the first spacer of the oxide film does not come in contact with a semiconductor substrate. Consequently, the gate hump phenomenon is prevented, as a result of which process yield and operation reliability of the device can be improved.
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Quirk et al., “Semiconductor Manufacturing Technology”, 2001, pp. 273-275.
Korean Patent Gazette from Korean Patent Office, publication date: Aug. 9, 2006.
Kim Bong Soo
Kim Dong Seok
Chaudhari Chandra
Hynix / Semiconductor Inc.
Ladas & Parry LLP
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