Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2006-06-20
2006-06-20
Estrada, Michelle (Department: 2823)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S634000, C438S681000, C438S687000, C438S763000, C438S781000
Reexamination Certificate
active
07064060
ABSTRACT:
A heat treatment is performed to an insulating film composition, formed on a semiconductor substrate, at a temperature of 350° C. in an inert gas ambient to form a non-porous insulating film. Next, dry etching is performed using a resist pattern as a mask to form a trench in the non-porous insulating film, ashing is performed to remove the resist pattern, and the surface of the semiconductor substrate is cleaned. Thereafter, a second heat treatment is performed for the non-porous insulating film to form a porous insulating film. Since the second heat treatment is performed in an oxidizing-gas atmosphere, the pore-generating material can be removed at a temperature lower than the temperature of conventional methods to form an insulating film having a low dielectric constant.
REFERENCES:
patent: 6093636 (2000-07-01), Carter et al.
patent: 6451712 (2002-09-01), Dalton et al.
patent: 6844257 (2005-01-01), Fornof et al.
patent: 2002/0074659 (2002-06-01), Dalton et al.
patent: 2002/0123240 (2002-09-01), Gallagher et al.
patent: 2003/0010961 (2003-01-01), Fukuyama et al.
patent: 2004/0152336 (2004-08-01), Miura et al.
patent: 2004/0197474 (2004-10-01), Vrtis et al.
patent: 2005/0054209 (2005-03-01), Hsu et al.
patent: 2005/0101157 (2005-05-01), Yunogami et al.
patent: 2005/0118782 (2005-06-01), Kim et al.
patent: 11-310411 (1999-11-01), None
patent: 2002-050687 (2002-02-01), None
Misawa Kaori
Ohashi Naofumi
Estrada Michelle
Leydig Voit & Mayer LTD
Sanyo Electric Co,. Ltd.
LandOfFree
Method for manufacturing semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for manufacturing semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for manufacturing semiconductor device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3641932