Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having schottky gate
Reexamination Certificate
2006-01-24
2006-01-24
Chaudhari, Chandra (Department: 2891)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having schottky gate
C438S312000
Reexamination Certificate
active
06989301
ABSTRACT:
The present invention achieves the enhancement of a manufacturing yield factor and the reduction of manufacturing cost in a manufacturing method of a semiconductor device having a hetero junction bipolar transistor (HBT), a Schottky diode and a resistance element. The present invention is directed to the manufacturing method of a semiconductor device in which respective semiconductor layers which become a sub collector layer, a collector layer, a base layer, a wide gap emitter layer and an emitter layer are sequentially formed over one surface of a semiconductor substrate and, thereafter, respective semiconductor layers are processed to form the hetero junction bipolar transistor, the Schottky diode and the resistance element in a monolithic manner. An emitter electrode of the hetero junction bipolar transistor, a Schottky electrode of the Schottky diode and a resistance film of the resistance element are simultaneously formed using a same material (for example, WSiN). Accordingly, the man-hours can be reduced and the manufacturing cost of the semiconductor device can be reduced.
REFERENCES:
patent: 5077231 (1991-12-01), Plumton et al.
patent: 5166083 (1992-11-01), Bayraktaroglu
patent: 5268315 (1993-12-01), Prasad et al.
patent: 5324671 (1994-06-01), Bayraktaroglu
patent: 5512496 (1996-04-01), Chau et al.
patent: 5672522 (1997-09-01), Streit et al.
patent: 6294018 (2001-09-01), Hamm et al.
patent: 2001-210723 (2001-08-01), None
Chen et al., “High-Speed InGaP/GaAs HBT's Using a Simple Collector Undercut Technique to Reduce Base-Collector Capacitance,”IEEE Electron Device Letters, vol. 18, No. 7, Jul. 1997, pp. 355-357.
Ahmari et al., “InGaP/CaAs Heterojunction Bipolar Transistor Grown on a Semi-Insulating InGaP Buffer Layer,”IEEE Electron Device Letters, vol. 18, No. 11, Nov. 1997, pp. 559-561.
Imamura Yoshinori
Inagawa Hiroshi
Kitahara Toshiaki
Kurokawa Atsushi
Chaudhari Chandra
Miles & Stockbridge P.C.
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