Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2005-10-04
2005-10-04
Sarkar, Asok Kumar (Department: 2829)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S643000, C438S653000, C438S685000, C438S687000, C438S696000
Reexamination Certificate
active
06951809
ABSTRACT:
A lower barrier layer made of tantalum nitride having a thickness of approximately 25 nm is deposited by sputtering on a fourth insulating film inclusive of the sidewall surfaces and the bottom surfaces of a via hole and an upper-interconnect-forming groove. The sputtering is performed under the conditions where approximately 10 kW of DC source power is applied to a target. Thereafter, the DC source power is reduced to approximately 2 kW, and approximately 200 W of RF power is applied to a semiconductor substrate. Here, the lower barrier layer is subjected to a sputter-etching process employing argon gas at an etching amount of approximately 5 nm, so that a part of the lower barrier layer deposited on the bottom surface of the via hole is at least partially deposited on the lower part of the sidewall surface of the via hole.
REFERENCES:
patent: 5933753 (1999-08-01), Simon et al.
patent: 6451177 (2002-09-01), Gopalraja et al.
patent: 6498091 (2002-12-01), Chen et al.
patent: 2001-284449 (2001-10-01), None
Ikeda Atsushi
Kishida Takenobu
Tarumi Nobuaki
McDermott Will & Emery LLP
Sarkar Asok Kumar
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