Method for manufacturing semiconductor device

Details Method for manufacturing semiconductor device Method for manufacturing semiconductor device

2002-06-17

2004-04-13

Everhart, Caridad (Department: 2825)

Semiconductor device manufacturing: process

Introduction of conductivity modifying dopant into...

Ion implantation of dopant into semiconductor region

C438S522000, C438S528000

Reexamination Certificate

active

06720241

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a semiconductor device, including a heat treatment method for activating impurity ion, which has been implanted into a semiconductor layer.
In recent years, there is an ever increasing demand for manufacturing processes for LSIs including MOS transistors in which the MOS transistors are miniaturized in order to further increase the speed and the degree of integration of LSIs.
In order to make advancements in the miniaturization of MOS transistors, it is necessary not only to reduce the gate length and the gate width of a transistor but also to reduce the height of the gate electrode and to realize shallower junctions by shallowing the junction plane of a source/drain diffusion layer.
Typically, a gate electrode of a MOS transistor is produced by forming a gate insulating film on a semiconductor substrate made of silicon, depositing a semiconductor layer made of polysilicon or amorphous silicon on the gate insulating film, and implanting impurity ion into the deposited semiconductor layer by an ion implantation method, so as to obtain an intended conductivity. Moreover, the source/drain diffusion layer is also formed by implanting impurity ion into the semiconductor substrate.
Herein, if the height of the gate electrode, i.e., the thickness of the deposited polysilicon film or amorphous silicon film, is reduced, it is necessary to also reduce the acceleration energy in the ion implantation when introducing an impurity. Similarly, it is necessary to reduce the acceleration energy in the ion implantation also for realizing a shallower junction of the source/drain diffusion layer.
On the other hand, in order to activate the impurity ion implanted into the semiconductor layer so as to provide a sufficient conductivity to the semiconductor layer despite the reduction in the acceleration energy, it is necessary to perform an annealing process for activating the impurity ion.
In the prior art, impurity ion is implanted into a semiconductor layer made of polycrystalline or amorphous silicon, and the implanted impurity ion is activated by performing an activation annealing process at a temperature of 700° C. or more with the semiconductor layer being exposed, or by performing an activation annealing process at a temperature of 700° C. or more after depositing a protection insulating film (cap layer) for an outward diffusion protection at a temperature of 700° C. or more on the semiconductor layer.
FIRST CONVENTIONAL EXAMPLE
A method for manufacturing a semiconductor device according to the first conventional example will now be described with reference to the drawings with respect to the activation annealing step for activating impurity ion, which has been implanted into a semiconductor layer.
FIG.
13
(
a
) to FIG.
13
(
c
) are cross-sectional views sequentially illustrating an impurity ion implantation step and an impurity ion activation annealing step according to the first conventional example.
First, as illustrated in FIG.
13
(
a
), a semiconductor layer
102
made of amorphous silicon having a thickness of about 80 nm is deposited on an insulating film
101
.
Then, as illustrated in FIG.
13
(
b
), boron (B
+
) ion, for example, is implanted under implantation conditions including an acceleration energy of about 3 keV and an implantation dose of about 5×10
15
cm
−2
, thereby forming an ion implantation region
102
a
in an upper portion of the semiconductor layer
102
.
Then, as illustrated in FIG.
13
(
c
), the semiconductor layer
102
, into which boron ion has been implanted, is subjected to an activation annealing process in a nitrogen atmosphere at a temperature of about 900° C. for about 30 minutes. Thus, the boron ion in the ion implantation region
102
a
is activated in the semiconductor layer
102
, and diffuses through thermal diffusion to the vicinity of the interface with the insulating film
101
.
By the activation annealing process, a portion of the implanted boron ion comes out of the semiconductor layer
102
through outward diffusion, and the semiconductor layer
102
is polycrystallized into a polysilicon layer
102
B.
In order to reduce the outward diffusion, a nitrogen atmosphere containing oxygen (O
2
) is used in some cases as the annealing atmosphere. However, even if oxygen is contained in the annealing atmosphere, the outward diffusion cannot be suppressed completely, and the thickness of the polysilicon layer
102
B is reduced because a surface portion of the semiconductor layer
102
is oxidized at the same time.
SECOND CONVENTIONAL EXAMPLE
The second conventional example will now be described with reference to the drawings.
FIG.
14
(
a
) to FIG.
14
(
d
) are cross-sectional views sequentially illustrating a heat treatment process for activating impurity ion according to the second conventional example.
First, as illustrated in FIG.
14
(
a
), a semiconductor layer
102
made of amorphous silicon having a thickness of about 80 nm is deposited on an insulating film
101
.
Then, as illustrated in FIG.
14
(
b
), boron (B
+
) ion, for example, is implanted under implantation conditions including an acceleration energy of about 3 keV and an implantation dose of about 5×10
15
cm
−2
, thereby forming an ion implantation region
102
a
in an upper portion of the semiconductor layer
102
.
Then, as illustrated in FIG.
14
(
c
), a silicon oxide (SiO
2
) film
104
as a protection insulating film is deposited on the semiconductor layer
102
by using a CVD method. Since the deposition temperature of the silicon oxide film
104
is typically 600° C. or more, a surface oxide film
103
is formed in a surface portion of the semiconductor layer
102
while the outward diffusion of boron ion also occurs. Furthermore, the semiconductor layer
102
is polycrystallized into a polysilicon layer
102
A.
Now, a silicon oxide film obtained by using a CVD method, which is typically used in a transistor formation process (front end process) for LSIs, will be described.
First, a TEOS film is a silicon oxide film whose reaction temperature is about 650° C. to 750° C. and which is obtained through thermal decomposition of tetraethylorthosilicate (TEOS: Si(OC
2
H
5
)
4
). During the deposition, an oxygen gas is added to a TEOS gas.
Next, an HTO film is a silicon oxide film whose reaction temperature is about 700° C. to 900° C. and which is obtained through a thermal reaction of dinitrogen monoxide (N
2
O) with monosilane (SiH
4
) or dichlorosilane (SiH
2
Cl
2
).
Incidentally, the silicon oxide film
104
illustrated in FIG.
14
(
c
) is an HTO film.
Then, as illustrated in FIG.
14
(
d
), the semiconductor layer
102
, into which boron ion has been implanted, is subjected to an activation annealing process in a nitrogen atmosphere at a temperature of about 900° C. for about 30 minutes. Thus, the boron ion is activated in the polysilicon layer
102
A, and diffuses through thermal diffusion to the vicinity of the interface with the insulating film
101
to form a polysilicon layer
102
B.
As described above, with the first conventional example, it is not possible to obtain a predetermined impurity profile due to the occurrence of outward diffusion. Moreover, when an oxygen gas is added to the nitrogen atmosphere in order to suppress the outward diffusion, the semiconductor layer
102
is oxidized, thereby failing to obtain an intended thickness.
Moreover, with the second conventional example, the outward diffusion occurs during the deposition of the silicon oxide film
104
, and the semiconductor layer
102
is exposed to an oxygen-containing gas in an early stage of the deposition, whereby the surface thereof is oxidized to form the surface oxide film
103
. This is because of the following reason. When the silicon oxide film
104
is deposited at a temperature of 500° C. or more, the semiconductor layer
102
is recrystallized (turned into polysilicon) to form the polysilicon layer
102
A, and a large number of crystal grain boundaries occur in the pol

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