Method for manufacturing resistance RAM device

Details Method for manufacturing resistance RAM device Method for manufacturing resistance RAM device

2009-04-22

2010-11-16

Garber, Charles D (Department: 2812)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

Reexamination Certificate

active

07833898

ABSTRACT:
Manufacturing a resistance RAM device includes the steps of forming an insulation layer on a semiconductor substrate having a bottom electrode contact; etching the insulation layer to define a hole exposing the bottom electrode contact; depositing sequentially a bottom electrode material layer and a TMO material layer selectively within the hole; depositing a top electrode material layer within the hole and on the insulation layer in such a way as to completely fill the hole in which the bottom electrode material layer and the TMO material layer are formed; removing partial thicknesses of the top electrode material layer and the insulation layer to form a stack pattern comprising a bottom electrode, a TMO, and a top electrode.

REFERENCES:
patent: 7492635 (2009-02-01), Kim et al.
patent: 2008/0002481 (2008-01-01), Gogl et al.
patent: 2008/0203469 (2008-08-01), Gruening-von Schwerin
patent: 2009/0034355 (2009-02-01), Wang
patent: 2009/0085121 (2009-04-01), Park et al.
patent: 2010/0084741 (2010-04-01), Andres et al.

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