Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2008-07-29
2008-07-29
Nhu, David (Department: 2818)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S106000, C257SE21231, C257SE21238, C257SE21508, C257SE21499, C257SE21517
Reexamination Certificate
active
07405144
ABSTRACT:
A method for manufacturing a probe card is provided. A first inactive layer, a first patterned photoresist layer and a first metal layer are sequentially formed on a substrate. The first metal layer has first through holes exposing a portion of the first patterned photoresist layer. A second inactive layer and a second patterned photoresist layer are sequentially formed thereon. The second patterned photoresist layer has second through holes exposing the first through holes. Pins are formed inside the first and the second through holes. A second metal layer is formed on the second patterned photoresist layer. One end of each pin is connected to the second metal layer. The pins and the second metal layer are taken out. A circuit carrier having third through holes is provided. The pins are inserted into the third through holes. The second metal layer is patterned to form pinheads.
REFERENCES:
patent: 5325052 (1994-06-01), Yamashita
patent: 6265888 (2001-07-01), Hsu
patent: 6608385 (2003-08-01), Zhou et al.
patent: 7227370 (2007-06-01), Kasukabe
ChipMOS Technologies (Bermuda) Ltd.
ChipMOS Technologies Inc.
J.C. Patents
Nhu David
LandOfFree
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