Semiconductor device manufacturing: process – Formation of semiconductive active region on any substrate – Amorphous semiconductor
Reexamination Certificate
2000-05-25
2002-05-07
Quach, T. N. (Department: 2814)
Semiconductor device manufacturing: process
Formation of semiconductive active region on any substrate
Amorphous semiconductor
C438S485000
Reexamination Certificate
active
06383898
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATION
This application is related to Japanese application No. Hei 11(1999)-150270 filed on May 28, 1999 and Hei 11(1999)-374085 filed on Dec. 28, 1999, whose priorities are claimed under 35 USC §119, the disclosure of which are incorporated by reference in those entirety.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a photoelectric conversion device and a method for manufacturing the same. More particularly, it relates to a photoelectric conversion device to be used for a thin film solar battery or the like formed by sandwiching a pin junction layer as a photoelectric conversion layer with electrodes, and a method for manufacturing the same.
2. Description of the Related Art
Various efforts have been made on the development of doped layers provided on the light-incident side of thin film solar batteries, which are one of important factors that relate to improvement of conversion efficiency. Especially, various researches are being made on p-layers which are one of doped layers on the light-incident side. The p-layers serve as amorphous silicon type window layers, but they are not photoelectric conversion layers themselves and must therefore satisfy contradicting requirements for a smaller amount of light absorption and preferable p-i interface characteristics with high conductivity.
For example, Japanese examined patent publications No. H3(1991)-40515 and No. H3(1991)-63229 disclose methods in which an a-SiC film doped with boron is used as a p-layer.
Those publications disclose methods for forming a p-layer by decomposing B
2
H
6
gas along with a mixture of gases such as silane or silane-derivative (e.g., SiH
4
), carbon hydride (e.g., CH
4
), H
2
and the like by glow discharge. Other commonly known methods include plasma CVD.
To form a photoelectric conversion layer on a light-transmissive substrate such as glass, it is a normal practice to fabricate a light-transmissive metal oxide film such as ITO, SnO
2
or the like on the glass since light is incident on the substrate side. A plasma CVD process is performed using a material gas (e.g., B
2
H
6
, SiH
4
, GeH
4
, CH
4
or the like) and a mixture of gases added with H
2
to form an a-Si film, an i-layer and an n-layer sequentially.
However, when plasma of B
2
H
6
gas is generated on such a metal oxide film, boron radicals abstract hydrogen which terminates bonds of Si in the a-Si film and a great number of uncombined bonds referred to as “dangling bonds” are formed, causing reduction of the metal oxide film. This darkens the metal oxide film. This increases the amount of light absorption of the p-layer serves as a window layer and decreases the light transmittance of the metal oxide film, which results in a remarkable decrease in a short-circuit current of the device.
In addition, since boron in the plasma also increases uncombined bonds on the surface of the film, a great number of recombination levels are generated at the p-i interface, which significantly causes a harmful influence on conversion efficiency. For example, when a SiC film doped with boron is used as the p-layer, the film is not preferably bonded to the photoelectric conversion layer, which makes it impossible to maintain sufficient Voc and F.F. Accordingly, a buffer layer (intrinsic SiC film) is normally inserted at the p-i interface. However, this layer is less conductive, which increases the internal resistance of the device and consequently reduces F.F.
Thus, delicate adjustments must be performed to hold the reduction of the conductivity at a minimum level and decrease the light absorption amount as small as possible.
Japanese unexamined patent publication No. H7(1995)-22638 discloses a method for manufacturing a p-layer in which a p-type amorphous silicon layer is formed by fabricating a laminate of an amorphous boron layer and an amorphous silicon layer. Further, Applied Physics 36, 467 (1997) proposes a method for forming a p-layer in which a laminate of an amorphous boron layer and an amorphous carbon layer is formed. However, it is still difficult to sufficiently reduce the amount of light absorption with the amorphous boron layer.
It is quite effective to coat the surface of the metal oxide film with ZnO or the like in order to suppress reduction of the metal oxide film. This increases the number of processing steps and the production costs.
In order to provide a high photoelectric conversion rate by making efficient use of spectra of sunbeams, widely used are tandem photoelectric conversion devices which have a structure in which a plurality of pin junction layers are stacked. In such photoelectric conversion devices, an optical band gap is optionally set in a photoelectric conversion layer in each of the pin junction layers to allow efficient use of a photoelectric current generated in each of the pin junction layers. However, an interface between the p-layer located in the middle and the n-layer adjacent to the p-layer inevitably exists. As a result, the quality of the film is sacrificed for obtaining preferable ohmic contact and, in practice, a recombined layer of about 3 nm that absorbs a great amount of light must be inserted at the interface.
Further, in such tandem photoelectric conversion devices, in general, the intermediate p-layer adjacent to the n-layer is formed by stacking a contact layer (a heavily doped a-Si layer) for establishing ohmic contact with the underlying adjacent n-layer and a silicon alloy film having a wide gap such as an a-SiC or a-SiO film. Problems arise in that the contact layer which is an inactive layer results in a great loss of light absorption and in that the series resistance of the silicon alloy film having a wide gap such as an a-SiC or a-SiO film increases beyond a negligible degree to reduce the F.F. of the photoelectric conversion device.
Thus, in the tandem photoelectric conversion devices formed by stacking a plurality of pin junction layers, it has been very difficult with conventional methods to obtain a window layer which meets the requirements of excellent interface characteristics for both of an n-type amorphous silicon layer (or microcrystalline silicon layer) and a photoelectric conversion layer by using a p-type doped layer having small light absorption and high conductivity.
The present invention has been made taking the above-described problems into consideration, and an object of the invention is to provide a photoelectric conversion device having small light absorption, high conductivity and preferable interface characteristics, and a method for manufacturing the same.
SUMMARY OF THE PRESENT INVENTION
According to the present invention, provided is a photoelectric conversion device including a plurality of pin junction layers, wherein at least a p-layer adjacent to an n-layer is comprised of a stack of an amorphous silicon layer as a first p-layer and an amorphous silicon layer as a second p-layer, the first p-layer having a thickness of 5 nm or less and containing a p-type impurity and an n-type impurity, and the second p-layer having a p-type impurity concentration gradually decreasing as it is closer to an i-layer.
The above-mentioned photoelectric conversion device is formed in accordance with a method for manufacturing a photoelectric conversion device including a plurality of pin junction layers comprising the steps of: forming a first p-layer of an amorphous silicon layer containing a p-type impurity and an n-type impurity adjacently to an n-layer; and forming a second p-layer of an amorphous silicon layer on the first p-layer adjacent to the n-layer by discharge-decomposition of a material gas not containing the p-type impurity, the second p-layer having a p-type impurity concentration gradually decreasing as it is closer to an i-layer.
According to another aspect of the present invention, provided is a method for manufacturing a photoelectric conversion device including one or plural pin junction layer(s), wherein a p-layer is provided by forming an amorphous silicon layer as a first p-layer with a thick
Nixon & Vanderhye P.C.
Quach T. N.
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