Method for manufacturing memory element

Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of...

Reexamination Certificate

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Details

C438S660000, C427S117000, C427S058000, C257S737000, C257SE23023, C257SE21476, C257S040000, C257S632000

Reexamination Certificate

active

07829473

ABSTRACT:
A first conductive layer is formed, a composition layer over the first conductive layer is formed by discharging a composition in which nanoparticles comprising a conductive material covered with an organic material are dispersed in a solvent, and the composition layer is dried. Subsequently, pretreatment is performed in which the organic material covering the nanoparticles, which are positioned on a surface of the composition layer, is decomposed, and then baking is performed. In this manner, a second conductive layer is formed by sintering nanoparticles which are positioned on a surface of the composition layer. A memory layer is formed between the first conductive layer and the second conductive layer using the nanoparticles covered with the organic materials to which the pretreatment is not performed.

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