Method for manufacturing mask ROMs by using a protection layer

Details Method for manufacturing mask ROMs by using a protection layer Method for manufacturing mask ROMs by using a protection layer

1992-04-23

1993-12-14

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 45, 437978, H01L 21266

Patent

active

052702375

ABSTRACT:
A method for manufacturing mask ROMs is disclosed, wherein a semiconductor substrate of a first conductive type, on which a gate insulating layer, a poly-silicon layer, source and drain regions and a spacer are formed is stored after depositing the entire surface of the structure with a protection layer until the next steps such as programming, so that the poly-silicon gate and the source and drain regions of the structure can be prevented from being polluted with organisms or matriums, etc. by forming a protection layer before the storage, thereby improving the efficiency and reliability of mask ROMs, and the ROM data region can be checked during the etching of the protecting layer for distinguishing the defective chips simply and efficiently in a short manufacturing time.

REFERENCES:
patent: 4356042 (1982-10-01), Gedaly et al.
patent: 4466172 (1984-08-01), Batra
patent: 5013674 (1991-05-01), Bergemont
Wolf et al., "Silicon Processing for the VLSI Era", pp. 514-520, 1986.

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