Semiconductor device manufacturing: process – Having magnetic or ferroelectric component
Reexamination Certificate
2007-05-22
2007-05-22
Lee, Calvin (Department: 2818)
Semiconductor device manufacturing: process
Having magnetic or ferroelectric component
C257S295000
Reexamination Certificate
active
10950584
ABSTRACT:
A magneto-resistive random access memory includes a MOS transistor having a first gate and source and drain junctions on a substrate, a lower electrode connected to the source junction, a first magnetic layer on the lower electrode, a dielectric barrier layer including aluminum and hafnium on the first magnetic layer which, together with the first magnetic layer, form a potential well, a second magnetic layer on the dielectric barrier layer opposite the first magnetic layer, an upper electrode on the second magnetic layer, a second gate interposed between the first gate and the lower electrode to control the magnetic data of one of the first and second magnetic layers, and a bit line positioned orthogonal to the first gate and electrically connected to the upper electrode. Improved characteristics of the barrier layer increase a magnetic resistance ratio and improve data storage capacity of the magneto-resistive random access memory.
REFERENCES:
patent: 6653703 (2003-11-01), Hosotani et al.
patent: 2002/0149962 (2002-10-01), Horiguchi
Kim Tae-wan
Lee Taek-dong
Park Byeong-kook
Park Sang-jin
Park Wan-jun
Lee Calvin
Lee & Morse P.C.
Samsung Electronics Co,. Ltd.
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