Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1997-12-29
1999-11-09
Tsai, Jey
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438628, 438629, H01L 2144
Patent
active
059813865
ABSTRACT:
A method for forming interconnection plugs comprising the steps of providing a substrate, then forming a dielectric layer having an opening that exposes a pad area for connection with other structures. Next, a glue layer is formed lining the opening and the dielectric layer. Subsequently, plug material is deposited into the opening to form a plug layer. This is followed by etching back the plug layer to a level higher than the glue layer that formed on the top of the dielectric layer. Thereafter, a metallic layer is formed over the plug layer, and a photoresist layer is then coated over the metallic layer. The metallic layer and the plug layer are then patterned by etching such that the plug layer is turned a plug. The characteristic of this invention lies in retaining a portion of the plug layer after the first etching such that the etched plug layer is at a level higher than the glue layer. Through combining the patterning of the metallic layer and the plug layer, one etching step is saved, moreover, recess formation can be prevented, thereby leading to no deterioration of electrical properties or lowering of the yield in the semiconductor devices.
REFERENCES:
patent: 4879257 (1989-11-01), Patrick
patent: 5827777 (1998-10-01), Schinella et al.
Ho Ching-Yuan
Hou Shang-Yun
Tsai Jey
Worldwide Semiconductor Manufacturing Corp.
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