Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Total dielectric isolation
Reexamination Certificate
1998-07-10
2001-03-06
Bowers, Charles (Department: 2813)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Total dielectric isolation
C438S723000
Reexamination Certificate
active
06197655
ABSTRACT:
TECHNICAL FIELD
The present invention relates to a method for manufacturing integrated structures including removing a sacrificial region. In particular, the method refers to the manufacture of integrated microstructures such as microsensors, microactuators and special micromechanisms.
BACKGROUND OF THE INVENTION
Recently, methods for manufacturing microstructures have been proposed, which are based on process and technology steps typical of the manufacture of integrated circuits and enabling a microintegrated structure and associated control electronics to be integrated in a single chip.
For example, EP-A-0 822 579 describes a method according to which an embedded sacrificial region of silicon oxide is formed above a substrate of monocrystalline silicon; a pseudo-epitaxial layer is then grown, which has, above the embedded sacrificial layer, a polycrystalline structure and elsewhere a monocrystalline structure; the electronic components of the circuitry are integrated in the monocrystalline structure portion of the pseudo-epitaxial layer; trenches are formed in the polycrystalline structure portion of the pseudo-epitaxial layer so as to define the form of the desired microintegrated structure and, through the trenches themselves, the embedded sacrificial region is etched so as to form a suspended mass which can be used as a static, kinematic or dynamic microstructure.
The operations of trenching and removing the embedded sacrificial region require two etching processes: a first etching through a thick silicon layer (the pseudo-epitaxial layer has typically a thickness of 8-9 &mgr;m) and a second etching using concentrated hydrofluoric acid. These operations are therefore somewhat complex, in particular the second wet etching process with a very aggressive solution gives rise to problems as regards already exposed pad metal regions. In fact tests carried out using a single masking resist layer for defining the microstructure and protecting the pad metal regions have produced negative results, since the machine used for forming the trenches (MXT machine made by AMT) is not sufficiently selective with respect to the resist layer.
Also, in the case of using a double resist mask, a first one defined on the active area nitride with the design of the desired microstructures and a second one covering the entire device, including the pads, except for large windows above the microstructures to be formed, has provided unsatisfactory results.
The same problem arises when it is required to remove a sacrificial layer or a region by an etching process which is aggressive and/or has long duration. In fact, present resist masks are unable to sufficiently withstand etching operations which have a duration of more than a few minutes and/or a high concentration (for example hydrofluoric acid with a concentration of up to 49%).
SUMMARY OF THE INVENTION
An object of the invention is therefore to provide a method so as to allow complete removal of sacrificial regions even when long durations and/or high concentrations of very aggressive solutions are required.
According to the present invention, there is provided a method for manufacturing integrated structures. In one embodiment of the invention, the method comprises forming a wafer including a semiconductor material substrate and a sacrificial region; forming an etching mask, which comprises silicon carbide, above the wafer; and removing the sacrificial regions using said etching mask.
Hereinafter, a method for manufacturing an integrated structure including a suspended mass formed in a region of polycrystalline silicon grown epitaxially will be described by way of a non-limiting example. However, as discussed below, the invention is not limited to the described example and extends in general to the use of a silicon carbide mask for protecting regions of semiconductor material, metal and other materials used in the microelectronics industry during etching for the removal of sacrificial regions.
REFERENCES:
patent: 4351894 (1982-09-01), Yonezawa et al.
patent: 5438015 (1995-08-01), Lur
patent: 5470797 (1995-11-01), Mastrangelo
patent: 5516710 (1996-05-01), Boyd et al.
patent: 0 822 579 A1 (1998-02-01), None
Goosen, J.F.L., et al., “Problems of Sacrificial Etching in a Combined Surface Micromachining and Electronic Process,”Proceedings of the 1996 National Sensor Conference, Delft, The Netherlands, Mar. 20-12, 1996, Mar. 20, 1996, pp. 193-196, XP 000697536.
Eriksen, Gert F. and Karsten Dyrbye, “Protective Coatings in Harsh Environments,” J. Micromech. Microeng. ©1996, 55-57, IOP Publishing LTD, U.K.
Castoldi Laura
Ferrera Marco
Gelmi Ilaria
Montanini Pietro
Blum David S
Bowers Charles
Galanthay Theodore E.
Iannucci Robert
Seed Intellectual Property Law Group PLLC
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