Semiconductor device manufacturing: process – Formation of semiconductive active region on any substrate – On insulating substrate or layer
Patent
1999-07-27
2000-09-19
Pham, Lona
Semiconductor device manufacturing: process
Formation of semiconductive active region on any substrate
On insulating substrate or layer
438479, 438341, H01L 2120
Patent
active
061211214
ABSTRACT:
An Al.sub.0.15 Ga.sub.0.85 N layer 2 is formed on a silicon substrate 1 in a striped or grid pattern. A GaN layer 3 is formed in regions A where the substrate 1 is exposed and in regions B which are defined above the layer 2. At this time, the GaN layer grows epitaxially and three-dimensionally (not only in a vertical direction but also in a lateral direction) on the Al.sub.0.15 Ga.sub.0.85 N layer 2. Since the GaN layer grows epitaxially in the lateral direction as well, a GaN compound semiconductor having a greatly reduced number of dislocations is obtained in lateral growth regions (regions A where the substrate 1 is exposed).
REFERENCES:
English Abstract of JP 11-191659 to Chocho, et al. (Jul. 1999).
English Abstract of JP 11-191657 to Kiyoku, et al. (Jul. 1999).
English Abstract of JP 11-191533 to Kozaki et al (Jul. 1999).
Pham Lona
Toyoda Gosei Co., Ltd
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