Method for manufacturing contact hole using an etching barrier l

Details Method for manufacturing contact hole using an etching barrier l Method for manufacturing contact hole using an etching barrier l

1999-05-18

2000-11-21

Utech, Benjamin L.

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

438734, 257774, H01L 21302

Patent

active

061502812

ABSTRACT:
A method for manufacturing contact holes in a semiconductor device is provided. In this method, a semiconductor substrate, having first and second conductive regions formed therein, is provided. A lower interdielectric layer is formed on the substrate. An etching barrier layer is formed on the lower interdielectric layer. The etching barrier layer is etched to form a plurality of holes for defining contact holes to be formed in different interdielectric layers. Then, a contact hole is formed in the lower interdielectric layer, using one of the holes in the etching barrier layer as an etching mask, and then a conductive layer pattern filling the contact hole is formed. Subsequently, an upper interdielectric layer and a mask pattern are sequentially formed on the conductive layer pattern. The upper interdielectric layer is etched, using the mask pattern as an etching mask, and then the lower interdielectric layer is etched, using the other hole in the etching barrier layer pattern as an etching mask, thereby completing a contact hole that passes through the upper and lower interdielectric layers. Thus, a plurality of contact holes of various heights can be formed with greater area tolerance and the process margin can be maximized.

REFERENCES:
patent: 5539231 (1996-07-01), Suganaga et al.
patent: 5627095 (1997-05-01), Koh et al.
patent: 5726499 (1998-03-01), Irinoda
patent: 5763323 (1998-06-01), Kim et al.

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