Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Self-aligned
Reexamination Certificate
2002-02-25
2003-12-09
Ho, Hoai (Department: 2818)
Semiconductor device manufacturing: process
Forming bipolar transistor by formation or alteration of...
Self-aligned
C438S372000, C438S373000
Reexamination Certificate
active
06660608
ABSTRACT:
FIELD OF THE INVENTION
This invention relates generally to a method for making a complementary metal-oxide semiconductor (CMOS).
BACKGROUND OF THE INVENTION
A CMOS device employs both n-channel and p-channel transistors to form logic elements. A common CMOS device comprises a silicon substrate having p-type and n-type regions (tubs) that define isolated active areas and transistor gates connected to form the input for the device. In a conventional method for making a CMOS device, boron is non-selectively implanted (e.g., without masks) to form sources/drains and to reduce the resistivity of the gates. With this implantation, the boron dose should be such that it diffuses to the bottom of an upper polysilicon level of the gate to prevent depletion effects. At the same time, it is undesirable for the boron to reach a lower oxide level of the gate oxide, as it will diffuse therethrough into the substrate and cause boron penetration problems. Accordingly, the boron-implantation step must balance these objectives and also the objectives necessary for the desired doping of the source/drains.
SUMMARY OF THE INVENTION
The present invention provides a CMOS fabrication process wherein the boron implanting step is replaced or supplemented by an aluminum implanting step. Aluminum diffuses faster than boron and thus reaches the bottom of the polysilicon more quickly, helping to prevent depletion effects. Also, aluminum also does not diffuse through oxide thereby essentially eliminating any substrate penetration problems.
More particularly, the present invention provides a method of making a CMOS device having p-channel and n-channel transistors. The method comprises the step of implanting aluminum to form a source and drain for the n-channel transistor in the p-type tub and to reduce the resistivity of the gates. The aluminum-implanting step can comprise, for example, depositing about 1×10
14
to about 5×10
14
aluminum atoms per square centimeter deposited at an energy of about 100 KeV and thereafter heating the substrate to a temperature of about 1100° C. to about 1200° C. for about 70 to about 90 minutes. Also, a compensating implant (e.g., phosphorus or arsenic) can be implanted over just the p-type tub to overcompensate the aluminum previously implanted therein.
The method can additionally include a supplemental boron implanting step performed after the aluminum implanting step. Such a supplemental boron-implanting step might be necessary or desired if a higher than industrial available dosage of aluminum is required for a desired doping effect. Morever, irrespective of these considerations, an initial aluminum implant is believed to form a sort of shield at the bottom of the gate's polysilicon layer thereby preventing boron penetration through its oxide layer during a subsequent boron implant.
REFERENCES:
patent: 4746964 (1988-05-01), Aronowitz
patent: 4910160 (1990-03-01), Jennings et al.
patent: 4940671 (1990-07-01), Small et al.
patent: 4999309 (1991-03-01), Buynoski
patent: 6221709 (2001-04-01), Sagarwala et al.
Advanced Micro Devices , Inc.
Ho Hoai
Lee Thao
Renner , Otto, Boisselle & Sklar, LLP
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