Method for manufacturing bipolar transistor capable of suppressi

Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Forming base region of specified dopant concentration profile

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438365, 438756, H01L 21331

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061241814

ABSTRACT:
In a method for manufacturing a bipolar transistor, a first insulating layer, a first polycrystalline silicon layer of a second conductivity type, and a second insulating layer are sequentially formed on a semiconductor substrate of a first conductivity type. Then, the second insulating layer and the first polycrystalline silicon layer are patterned to form an opening therein. Then, the first insulating layer is over etched by using the second insulating layer and the first polycrystalline silicon layer as a mask. Then, a second polycrystalline silicon layer is formed on the entire surface. Then, an oxidizing process is performed upon the second polycrystalline silicon layer except for a part of the second polycrystalline silicon layer under the first polycrystalline silicon layer, and the oxidized part of the second polycrystalline silicon layer is removed by a wet etching process. Then, impurities of the second conductivity type are implanted into the semiconductor substrate to form a base region. Then, a sidewall insulating layer is formed on a sidewall of the first and second polycrystalline silicon layers. Then, a third polycrystalline silicon layer of the first conductivity type is formed on the base region. Finally, an annealing operation is carried out. As a result, impurities of the second conductivity type are diffused from the first polycrystalline silicon layer via the second polycrystalline silicon into the semiconductor substrate to form a graft base region, and impurities of the first conductivity type are diffused from the third polycrystalline silicon layer into the base region to form an emitter region.

REFERENCES:
patent: 5523244 (1996-06-01), Vu et al.
patent: 5523245 (1996-06-01), Imai

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