Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2002-01-14
2004-04-06
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S943000, C438S945000, C427S468000, C427S272000, C204S192170
Reexamination Certificate
active
06716736
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a method for manufacturing a semiconductor device, in particular to a method for manufacturing an under-bump metallurgy (UBM) layer of a semiconductor device.
2. Description of the Related Art
The numbers of I/O (Input/Output) on current silicon chips increase with the increase in the degree of integration and operation speed. The silicon chip package is developed from the original wire bonding technology to the flip-chip bonding technology.
In the flip-chip bonding technology, one of the most important processes is to form solder bumps on the bonding pads of the silicon chip. The material currently used for the bonding pads of the semiconductor is usually aluminum or copper. However, the solder in the solder bumps tends to react with the aluminum or copper. To solve this problem, it is possible to form an under-bump metallurgy layer on the bonding pads before the solder bumps are formed, so as to avoid the solid-solution reaction between the solder in the solder bumps and the aluminum or copper in the bonding pads, or to avoid the formation of the intermetallic compound. As described above, the under-bump metallurgy layer has to be well bonded to the solder bumps and the bonding pads, and functions as a diffusion barrier layer so as to prevent the solder bumps from reacting with the bonding pads. In addition, if the under-bump metallurgy layer reacts with the solder, it is necessary to lower the speed of reaction between the under-bump metallurgy layer and the solder, so as to prevent the under-bump metallurgy layer from being etched through. Consequently, the under-bump metallurgy layer is usually composed of a plurality of material layers so as to be well bonded to the solder bumps and the bonding pads, respectively, and to lower the speed of reaction between the under-bump metallurgy layer and the solder.
The conventional method for manufacturing the under-bump metallurgy layer includes defining by the photolithography process and forming the pattern of the under-bump metallurgy layer. The conventional method for manufacturing the under-bump metallurgy layer will be described in the following.
As shown in
FIG. 1A
, in the conventional method for manufacturing the under-bump metallurgy layer, a wafer
10
on which bonding pads
11
are formed is firstly provided. The bonding pads
11
may be composed of aluminum or copper. Then, an under-bump metallurgy layer
20
is formed on the wafer
10
. The under-bump metallurgy layer
20
may be composed of a plurality of material layers. For example, the under-bump metallurgy layer
20
may include an adhesive layer
21
, a barrier layer
22
and a wetting layer
23
, respectively. Specifically, the function of the adhesive layer
21
is to enhance its adhesion to the bonding pads
11
. The adhesive layer
21
is usually composed of a metallic material such as titanium, chromium, copper, aluminum, or a similar material. The barrier layer
22
is provided between the adhesive layer
21
and the wetting layer
23
, and is usually composed of a material such as titanium, a titanium-tungsten compound, a nickel-vanadium compound, a chromium-copper compound, or a similar material. The wetting layer
23
, which is usually composed of copper, can be bonded to the solder bumps, and can avoid the solid-solution reaction between the solder in the solder bumps and the aluminum or copper in the bonding pads, or the formation of the intermetallic compound.
As shown in
FIG. 1B
, a resist layer
30
is then formed on the under-bump metallurgy layer
20
. Next, the resist layer
30
is exposed using a pre-designed pattern as a mask. Then, parts of the resist layer
30
are removed by the development with the developer.
As shown in
FIG. 1C
, the under-bump metallurgy layer
20
is etched using the remaining resist layer
30
as a mask. Finally, the remaining resist layer
30
is stripped. Thus, the under-bump metallurgy layer
20
having the required pattern can be formed on the wafer
10
. Generally, the under-bump metallurgy layer
20
is formed on the bonding pads
11
.
To sum up, in the conventional technology for manufacturing an under-bump metallurgy layer, a lot of processes (the photolithography process is the key process) have to be used. Therefore, it takes a lot of time and manufacturing costs, including the costs of manufacture machine, chemical material, and the like. In addition, the resist layer
30
and developer used in the above-mentioned process are almost all organic chemicals, which usually adversely affect the human body and the environment. Therefore, it is an important subject matter of the invention to provide a method for manufacturing the under-bump metallurgy layer with decreased steps and without using the resist layer and developer.
SUMMARY OF THE INVENTION
In view of the above-mentioned problems, it is therefore an object of the invention to provide a method for manufacturing an under-bump metallurgy layer capable of reducing the manufacturing steps.
Another object of the invention is to provide a method for manufacturing an under-bump metallurgy layer without using a photoresist and a developer.
To achieve the above-mentioned objects, a method of forming an under-bump metallurgy layer on a wafer includes: preparing a plate having a plurality of openings; placing the plate on the wafer; and sputtering the material of the under-bump metallurgy layer on the wafer using the plate as a sputter mask.
In this invention, the pattern of the openings is substantially identical to the pattern of the under-bump metallurgy layer formed on the wafer.
In addition, the under-bump metallurgy layer may include a plurality of metal layers. Therefore, a plurality of metal materials may be sputtered sequentially on the wafer with the plate as a sputter mask. In other words, the under-bump metallurgy layer can be composed of an adhesive layer, a barrier layer and a wetting layer in order.
As described above, since the plate serves as the sputter mask for forming the under-bump metallurgy layer in this invention, no resist layer formed by the photolithography process is needed. Thus, the manufacturing steps can be decreased, and the usage of the organic chemicals such as the photoresist, developer and the like can also be avoided.
REFERENCES:
patent: 6153503 (2000-11-01), Lin et al.
patent: 6426281 (2002-07-01), Lin et al.
patent: 2002/0162579 (2002-11-01), Wang et al.
Chen Shih-Kuang
Hsu Chih-Hsiang
Advanced Semiconductor Engineering Inc.
Birch & Stewart Kolasch & Birch, LLP
Fourson George
Maldonado Julio J.
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