Radiation imagery chemistry: process – composition – or product th – Imaging affecting physical property of radiation sensitive... – Making electrical device
Reexamination Certificate
1998-07-07
2001-05-15
Huff, Mark F. (Department: 1756)
Radiation imagery chemistry: process, composition, or product th
Imaging affecting physical property of radiation sensitive...
Making electrical device
C430S313000, C430S324000, C427S096400, C427S126600
Reexamination Certificate
active
06232042
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to electrical circuits and their fabrication. More particularly, this invention relates to a relatively uncomplicated process for forming thin-film metal resistors with improved dimensional tolerances.
2. Description of the Prior Art
Thin-film metal resistors have been employed in hybrid electronic circuits generally by vacuum deposition on small substrates. Nickel-based compositions such as nickel-chromium are often used, as well as other materials such as chromium silicide and tantalum nitride. Nickel-phosphorus thin film resistors have also been formed by lamination of large sheets of Ni-P-plated copper foil in printed circuit board constructions, with subsequent subtractive etching steps to define the resistors. These subtractive etching processes present the drawback of poor dimensional control due to the undercut effects of isotropic wet etching. To ensure a linear relationship between resistor aspect ratio (L/W) and resistance, a single resistor width is often used for all aspect ratios within a circuit, which imposes an undesirable restriction on the circuit layout or design. A second drawback of subtractive etching is that chemical etchants for the resistor metal are different from those typically employed in circuit board fabrication.
Accordingly, it would be desirable if a method were available that reduced the complexity of processing metal integral resistors while also promoting accurate control of resistance tolerances.
SUMMARY OF THE INVENTION
According to the present invention, there is provided a method for manufacturing a microelectronic assembly to have a resistor, and particularly a metal resistive film, with desirable processing and dimensional characteristics. The method generally entails applying a photosensitive dielectric to a substrate to form a dielectric layer. The dielectric layer is photoimaged such that a first portion of the dielectric layer on a first region of the substrate is soluble, while a second portion of the dielectric layer on a second region of the substrate is insoluble. An electrically resistive film is then applied to the dielectric layer, and the dielectric layer is developed to remove concurrently the first portion thereof and a portion of the resistive film overlying the first portion, so that a portion of the resistive film remains over the second portion to form the resistor. An alternative process order is to apply the resistive film prior to exposing the dielectric layer to radiation, and then exposing the dielectric layer through the resistive film. This technique requires that the thickness and electromagnetic properties of the resistive film permit electromagnetic penetration through the film to allow activation of the photosensitive characteristics of the photosensitive dielectric.
According to this invention, the resistive film is preferably a multilayer film that includes an electrically resistive layer, such as NiP, NiCr or another nickel-containing alloy, and a backing such as a layer of copper. Once laminated to the dielectric layer, the copper layer can be selectively removed using conventional etchants to leave the resistive layer on the surface of the dielectric layer. Alternatively, the resistive film can be formed by electroless plating or by evaporating or sputtering onto the dielectric layer. The method of this invention also preferably entails applying a second dielectric layer over the first dielectric layer after developing the first dielectric layer, forming openings in the second dielectric layer to expose portions of the remnant electrically resistive film, and then plating the exposed portions of the resistive film to form terminals for electrical connection to the film.
According to the above, the preferred method of this invention entails only a single metal etch using conventional etchants in order to selectively remove the backing of the film laminate. Therefore the present invention is not complicated by multiple etch steps with nonstandard etchants as are prior art methods for forming metal integral resistors. Importantly, the present method also achieves excellent edge definition of the resistor during the process of removing the excess portion of the resistive layer with the soluble portion of the dielectric layer. As a result of this technique, the width of the resistor can be accurately controlled without any undercutting of the resistor. Finally, the method of this invention achieves accurate placement of the terminals for the resistor using photodefinition, thereby accurately determining the electrical length of the resistor. Consequently, the dimensional and resistance tolerances of a metal integral resistor produced by the method of this invention are tighter than those possible with prior art methods.
Other objects and advantages of this invention will be better appreciated from the following detailed description.
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Mahler, et al., “Planar Resistor Technology for High-Speed Multilayer Boards”,Electronic Packaging&Production, Jan., 1986, pp. 1-5.
Beuhler Allyson
Dunn Gregory J.
Savic Jovica
Barreca Nicole
Fekete Douglas D.
Huff Mark F.
Motorola Inc.
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