Semiconductor device manufacturing: process – Formation of semiconductive active region on any substrate – On insulating substrate or layer
Reexamination Certificate
2000-06-15
2002-12-24
Mulpuri, Savitri (Department: 2812)
Semiconductor device manufacturing: process
Formation of semiconductive active region on any substrate
On insulating substrate or layer
C438S483000
Reexamination Certificate
active
06498076
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor laser comprising current blocking layers consisting of a p-type InP layer and an n-type InP layer provided on both sides of an active layer.
2. Detailed Description of the Related Art
In conventional method for manufacturing a semiconductor laser comprising current blocking layers consisting of a p-type InP layer and an n-type InP layer provided on both sides of an active layer, the semiconductor laser is formed without etching a substrate by utilizing small-width selective growth technique as described, for example, in Japanese Patent Laid-open Publication No. Hei 6-104527 and Japanese Patent Laid-open Publication No. Hei 7-162093. When growing the current blocking layers in the prior art, for example, the layers have been grown under constant growth conditions with atmospheric pressure metalorganic vapor phase epitaxy (hereinafter abbreviated as atmospheric pressure MOVPE) process without changing the growth conditions in the course of growth. However, when growing the layer under conditions of high temperature and high pressure of raw gas of group V element, for example, there has been such a problem that abnormality is generated in the configuration with the planes of the higher-order being exposed as shown in
FIG. 1
due to the effect of edge growth in the vicinity of a double hetero (DH) structure. In
FIG. 1
, a DH structure portion
101
is formed on a InP substrate
100
and current blocking layers consisting of a p-InP current blocking layer
102
and an n-InP current blocking layer
103
are formed on the InP substrate
100
at both sides of the DH structure portion
101
. An InP cladding layer
104
is formed on the entire surface. Abnormality of the current blocking layers
102
,
103
is generated in the vicinity of the double hetero (DH) structure portion
101
.
This problem occurs because the length of surface migration of a group III raw element on (
100
) plane becomes extremely short when growing the n-InP current blocking layer
103
under conditions of high temperature and high pressure of group V raw gas in the atmospheric pressure MOVPE process.
FIG. 2
shows the result of quantitative evaluation of this phenomenon by an experimental method to be described later in the description of preferred embodiment of the present invention. In
FIG. 2
, the relationship between L(
111
)B and L(
100
) of non-doped InP and n-type InP having carrier concentration of 3×10
18
cm
−3
is shown by a graph. L denotes a migration length. As the graph shows, the length of surface migration is decreased significantly by n-doping. The abnormal shape shown in
FIG. 1
is caused as the group III raw element is trapped in the higher-order planes before forming the (
100
) plane, because the length of surface migration is short in the vicinity of the DH structure during growth of the n-InP current blocking layer under conditions of high temperature and high pressure of raw gas containing group V element.
Such an abnormal shape has an adverse effect also on the device characteristics. When the abnormal shape of the higher-order planes such as (
311
) being exposed remains, growing of buried layer proceeds in which the growth of the higher-order planes is predominant right above the DH structure in the subsequent process of growing a p-type InP cladding layer. Meanwhile, it has been reported that the carrier concentration varies significantly with the orientation of plane by, for example, R. Bhat et. al (Journal of Crystal Growth, 107 (1991), pp772-778). Particularly in the p-type InP, efficiency of doping decreases when the growth of higher-order planes is predominant. Consequently, when the abnormal shape is formed during the growth of the n-InP current blocking layer, p-type carrier concentration decreases when growing the p-type cladding layer, leading to high resistance of the element that increases voltage drop, thus resulting in deterioration of the element characteristics.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a method for manufacturing a semiconductor laser comprising a p-InP current blocking layer and an n-InP current blocking layer formed on both sides of an active layer, that is capable of effectively preventing the n-InP current blocking layer from growing abnormally.
According to the present invention, a method for manufacturing the semiconductor laser comprises the steps of selectively growing a multi-layer semiconductor film including an active layer on a predetermined region of an n-type semiconductor substrate, and forming a growth blocking film only on the multi-layer semiconductor film and forming a p-InP current blocking layer and an n-InP current blocking layer in this order on both sides of the multi-layer semiconductor film, wherein the length of surface migration is controlled to be 1500 nm or more when forming the n-InP current blocking layer.
According to this method for manufacturing the semiconductor laser, since the length of surface migration is controlled to be at least 1500 nm when forming the n-InP layer, abnormal growth of the n-type InP layer in the vicinity of the multi-layer semiconductor film including an active layer can be effectively prevented.
The present invention also provides a method for manufacturing a semiconductor laser comprising the steps of selectively growing a multi-layer semiconductor film including an active layer on a predetermined region of a p-type semiconductor substrate, and forming a growth blocking film only on the multi-layer semiconductor film and forming an n-InP current blocking layer and a p-InP current blocking layer in this order on both sides of the multi-layer semiconductor film, wherein the length of surface migration is controlled to be at least 1500 nm when forming the n-InP current blocking layer.
According to this method for manufacturing the semiconductor laser, since the length of surface migration is controlled to be not less than 1500 nm when forming the n-type InP layer, flatness of the n-type InP layer can be improved. This allows satisfactory growth of the p-type InP layer on the n-type InP layer, thus making it possible to form the current blocking layers in a designed configuration.
REFERENCES:
patent: 6-104527 (1994-04-01), None
patent: 7-162093 (1995-06-01), None
patent: 7-202317 (1995-08-01), None
patent: 07254750 (1995-11-01), None
patent: 9-83077 (1997-03-01), None
patent: 10-178232 (1998-06-01), None
patent: 10-303499 (1998-11-01), None
patent: 11-112102 (1999-04-01), None
R. Bhat, et al., “Orientation dependence of S, Zn, Si, Te, and Sn doping in OMCVD growth of InP and GaAs: application to DH lasers and lateral p-n junction arrays grown on non-planar substrates”, Journal of Crystal Growth 107 (1991), pp. 772-778.
Japanese Office Action dated Jul. 18, 2001, with partial English translation.
Sakata et al., “Low Threshold and High Uniformity for Novel 1.3-um-Strained InGaAsP MQW DC-PBH LD's Fabricated by the All-Selective MOVPE Technique”, IEEE Photonics Technology Letters, vol. 9, No. 3, Mar. 1997, pp. 291-293.
Extended Abstracts (The 59th Autumn Meeting, 1998); The Japan Society of Applied Physics, JSAP Catalog No.: AP981129-01, Sep. 15-18, 1998, p. 272.
McGinn & Gibb PLLC
Mulpuri Savitri
NEC Corporation
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