Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
2006-07-18
2006-07-18
Norton, Nadine G. (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S655000, C438S689000, C438S299000, C438S300000, C438S216000, C438S164000, C257S332000, C257S063000, C134S003000
Reexamination Certificate
active
07078345
ABSTRACT:
There is disclosed a method of manufacturing a semiconductor device comprising forming a diffusion region containing arsenic impurity at a concentration of 1×1020cm−3or more in an element region of Si substrate which is isolated by an element isolating insulation film with a gate electrode being employed as a mask, depositing Ni metal all over the substrate, heat-treating the substrate at a temperature of less than 400° C., thereby forming a nickel silicide film containing Ni2Si on the diffusion region, removing unreacted Ni metal deposited on the element isolating insulation film, heat-treating the substrate at a temperature of 450° C. or more, thereby forming an NiSi film having a arsenic compound layer on the surface thereof, removing the arsenic compound layer by an alkaline liquid, depositing an interlayer insulating film the entire surface of the substrate, and forming a wiring layer piercing through the interlayer insulating film.
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Finnegan Henderson Farabow Garrett & Dunner L.L.P.
George Patricia
Kabushiki Kaisha Toshiba
Norton Nadine G.
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