Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate
Reexamination Certificate
2002-10-24
2004-08-31
Le, Dung A. (Department: 2818)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Insulative material deposited upon semiconductive substrate
C438S680000
Reexamination Certificate
active
06784117
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for manufacturing a semiconductor device wherein a USG film is formed on a semiconductor substrate in which an impurity region of a first conduction type and an impurity region of a second conduction type formed.
2. Background Art
Now, progress has been made in the further multi-layer formation technique for wiring structures and also in the reduction in space between adjacent wiring layers, both attended with the advancing scale down of semiconductor devices of a high degree of integration, with the tendency that differences in steps on the surface of semiconductor devices become greater. A greater step difference reflects on a greater difference in step of an interlayer insulating film, thus bringing about the problem that upon formation of wiring layers, for example, a processing accuracy lowers, thereby lowering a yield of product. Accordingly, there is a demand for a technique of flattening an interlayer insulating film.
For an interlayer insulating film which is able to be flattened, there is known a USG (undoped silicate glass) film that is formed by thermal reaction between tetraethyl orthosilicate (Si(OC
2
H
5
)
4
, hereinafter referred to as TEOS) and ozone (O
3
). Attention has now been paid to this film as a material capable of forming a well-flattened surface because of the reflow of an intermediate product being heated.
However, the USG film has such a nature that its growing rate differs depending on the characteristics of an underlying layer (such a nature being hereinafter referred to as underlying layer dependence).
FIG. 7
is a sectional view showing the case where a USG film
16
is formed on a silicon substrate
15
having a region activated as an N+-type (hereinafter referred to as N+-type active region)
13
and a region activated as a P+-type (hereinafter referred to as P+-type active region)
14
. In the instance of the figure, the surface of the silicon substrate
15
on which the USG film is formed is flat. Nevertheless, the surface of the USG film
16
formed on this flat silicon substrate
15
is not flat, with a difference t in thickness being observed partly. This is described in detail.
As shown in
FIG. 7
, the thickness of the USG film on the P+-type active region
14
and the silicon substrate
15
is uniform, thereby forming a fiat surface. However, the USG film formed on the N+-type active region has a thickness smaller than that formed on the P+-type active region
14
and the silicon substrate
15
. More particularly, the thickness difference t is created between the USG film portions
16
a
,
16
b
on the P+-type active region
14
and the silicon substrate
15
and the USG film portion
16
c
on the N+-type active region
13
, so that although the underlying semiconductor substrate
15
is formed as flat, the surface of the USG film is not flat. When such a thickness difference is established and the thickness of the USG film portion on the N+-type active region
13
becomes smaller, a problem arises in that when the USG film is etched, for example, in a subsequent step, overetching takes place only at the N+-type active region
13
, thereby causing a variation in resistance of the resultant transistor.
SUMMARY OF THE INVENTION
The invention has been made in order to overcome the above-stated problems. More particularly, the invention has for its object the provision of a method for manufacturing a semiconductor device wherein a USG film can be formed while reducing the underlying layer dependence.
According to one aspect of the present invention, in a method for manufacturing a semiconductor device wherein a USG film is formed over a semiconductor substrate that has an impurity region of a first conduction type and an impurity region of a second conduction type formed therein, an oxide film is formed on a surface of the semiconductor substrate. The USG film is formed on the oxide film.
According to another aspect of the present invention, in a method for manufacturing a semiconductor device wherein a USG film is formed on a semiconductor substrate that has an impurity region of a first conduction type and an impurity region of a second conduction type formed therein, the USG film is formed by a chemical vapor deposition method at a pressure lower than 30 Torr.
According to another aspect of the present invention, in a method for manufacturing a semiconductor device wherein a USG film is formed on a semiconductor substrate that has an impurity region of a first conduction type and an impurity region of a second conduction type formed therein, the USG film includes a first USG film and a second USG film formed on the first USG film. The first USG film is formed by a chemical vapor deposition method at a pressure lower than 30 Torr. The second USG film is formed by a chemical vapor deposition method at a pressure of 100 Torr to 600 Torr.
According to another aspect of the present invention, in a method for manufacturing a semiconductor device wherein a USG film is formed over a semiconductor substrate that has an impurity region of a first conduction type and an impurity region of a second conduction type formed therein, an insulating film, selected from the group consisting of a BSG film, a PSG film and a BPSG film, is formed on the semiconductor substrate.
Other and further objects, features and advantages of the invention will appear more fully from the following description.
REFERENCES:
patent: 5532191 (1996-07-01), Nakano et al.
patent: 6221755 (2001-04-01), Tokumasu et al.
patent: 2001/0051424 (2001-12-01), Lin et al.
patent: 8-31814 (1996-02-01), None
patent: 11-260750 (1999-09-01), None
Burns Doane Swecker & Mathis L.L.P.
Le Dung A.
LandOfFree
Method for manufacturing a semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for manufacturing a semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for manufacturing a semiconductor device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3271722