Method for manufacturing a planarized metal layer for semiconduc

Adhesive bonding and miscellaneous chemical manufacture – Delaminating processes adapted for specified product – Delaminating in preparation for post processing recycling step

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156644, 437194, 437203, 437246, B44C 122, C03C 1500, C03C 2506

Patent

active

052000303

ABSTRACT:
A method for manufacturing a planarized metal layer on a wafer of a semiconductor device by providing a wafer and sequentially depositing a conducting layer 1 and an insulating layer 2 on the wafer 10 is described. A contact hole is formed in a portion of the insulating layer 2 exposing a portion of the underlying conducting layer 1 and simultaneously forming a step difference. The resulting wafer 10 comprising the contact hole is placed into a first chamber and heated in order to degas the insulating layer 2 and a first metal layer 3 is deposited on the degassed insulating layer 2 and on the contact hole 5 to a thickness of about 10 to 50% of the desired predetermined final thickness. The resulting wafer comprising the first metal layer is placed into a second chamber and heated. A second metal layer 4 is then deposited on the first metal layer 3 to a thickness of about 50 to 90% of the desired predetermined final thickness to provide a planarized metal layer.

REFERENCES:
patent: 4631806 (1986-12-01), Poppert et al.
patent: 4812419 (1989-03-01), Lee et al.
patent: 4936950 (1990-06-01), Doan et al.
patent: 4987099 (1991-01-01), Flanner

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