Semiconductor device manufacturing: process – Chemical etching
Reexamination Certificate
1998-12-23
2001-08-21
Utech, Benjamin L. (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
69, C216S023000, C216S038000, C428S131000
Reexamination Certificate
active
06277748
ABSTRACT:
BACKGROUND
1. Field of the Invention
This invention relates generally to a method for planarizing wafer-based integrated circuits and more particularly to a novel method for planarizing the surface of an integrated circuit having optical elements disposed thereon. Even more particularly, the invention relates to a novel method for planarizing the reflective surface of a wafer-based, reflective light valve backplane.
2. Description of the Background Art
Wafer-based reflective light valves have many advantages over their transmissive predecessors. E or example, conventional transmissive displays are based on thin-film transistor (TFT) technlology, whereby the displays are formed on a glass substrate, with the TFTs disposed in the spaces between the pixel apertures. Placing the driving circuitry between the pixel apertures limits the area of the display available for light transmission, and therefore limits the brightness of transmissive displays. In contrast, the driving circuitry of reflective displays is located under reflective pixel mirrors, and does not, therefore, consume valuable surface area of the display. As a result, reflective displays are more than twice as bright as their transmissive counterparts.
Another advantage of wafer-based reflective displays is that they can be manufactured with standard CMOS processes, and can therefore benefit from modern sub-micron CMOS technology. In particular, the reduced spacing between pixel mirrors increases the brightness of the display, and reduces the pixelated appearance of displayed images. Additionally, the CMOS circuitry switches at speeds one or more orders of magnitude faster than comparable TFT circuitry making wafer-based reflective displays well suited for high speed video applications such as projectors and camcorder view finders.
FIG. 1
is a cross-sectional view of a prior art reflective display backplane
100
, which is formed on a silicon substrate
102
, and includes a layer
104
of integrated circuitry, an insulating support layer
106
, a plurality of pixel mirrors
108
, and a protective oxide layer
110
. Each of pixel mirrors
108
is connected, through an associated via
112
, to the circuitry of layer
104
. Backplane
100
is typically incorporated into a reflective light valve (e.g., a liquid crystal display) by forming a layer
114
of an optically active medium (e.g., liquid crystal) over the pixel mirrors, and forming a transparent electrode (not shown) over the optically active medium. Light passing through the medium is modulated (e.g., polarization rotated), depending on the electrical signals applied to pixel mirrors
108
.
One problem associated with prior reflective displays is that the generated images often appear mottled. One source of mottling in reflective displays is the non-uniform alignment of the liquid crystals in layer
114
. The formation of liquid crystal layer
114
typically includes a wiping or rubbing step wherein a roller or similar object is passed over the liquid crystal layer, resulting in alignment of the liquid crystals. However, pixel mirrors
108
project upward from the surface of backplane
100
. defining gaps between adjacent pixel mirrors. Known wiping processes are ineffective to align the liquid crystals (represented by arrows in layer
114
) in these gaps. Additionally the misaligned crystals adversely affect the alignment of neighboring crystals in layer
114
.
What is needed is a reflective backplane with a planar surface to facilitate the effective alignment of the entire liquid crystal layer.
In many cases (e.g., substrates including optical elements) it is necessary to maintain strict control over the thickness of films remaining on the surface, because the thickness of films over optical elements is often critical to the proper optical functionality of the element.
What is also needed, therefore, is a method for planarizing the surface of substrates having optical elements disposed on their surface, while maintaining control over the thickness of any layers remaining over the optical elements.
SUMMARY
The present invention overcomes the limitations of the prior art by providing a novel method for planarizing a substrate (e.g., a reflective display backplane) including a plurality of surface prjections (e.g., pixel mirrors) without affecting the thickness of layers formed on the surface projections. Where the substrate is a reflective display backplane, the resulting planar surface facilitates the effective alignment of liquid crystal materials deposited thereon.
A disclosed method includes the steps of forming an etch-resistant layer on the substrate, forming a fill layer on the etch-resistant layer, and etching the fill layer to expose portions of the etch-resistant layer overlying the projections, and leaving a portion of the fill layer in the gaps between the projections. In a particular method, the substrate is an integrated circuit and the projections are optical elements. In a more particular method, the substrate is a reflective display backplane and the projections are pixel mirrors.
The etch-resistant layer may include an optical thin film layer, and may be formed as a single layer. Optionally, the etch-resistant layer includes a plurality of sublayers, for example an optical thin film layer and an etch-resistant cap layer. In a particular method, the step of forming the etch-resistant layer includes a step of forming an oxide layer and a second step of forming a nitride layer on the oxide layer.
The step of forming a fill layer on the etch-resistant layer may include the step of applying a spine-on coating (e.g., spin-on glass) over the etch-resistant layer. Optionally, the fill layer includes a suitable dopant to absorb light of a particular wave length or wavelengths.
The method of the present invention further includes an optional step of forming a protective layer over the exposed portions of the etch-resistant layer and the remaining portions of the fill layer. The protective layer may include a single layer or multiple layers. For example, in a particular disclosed method, the step of forming the protective layer includes a first step of forming, an oxide layer over the exposed portions of the etch-resistant layer and the remaining portions of the fill layer, and a second step of forming a nitride layer over the oxide layer.
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patent: 5937272 (1999-08-01), Tang
Haskell Jacob Daniel
Hsu Rong
Aurora Systems, Inc.
Henneman & Saunders
Henneman, Jr. Larry E.
Umez-Eronini Lynette T.
Utech Benjamin L.
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