Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2002-02-27
2003-11-11
Smith, Matthew (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C700S096000, C700S105000, C700S110000, C700S120000, C700S121000, C430S005000, C378S035000, C382S144000
Reexamination Certificate
active
06647543
ABSTRACT:
BACKGROUND OF THE INVENTION
(a) Field of the Invention
The present invention relates to a method for manufacturing a pair of complementary masks and, more particularly, to an improvement of the method for manufacturing a pair of complementary masks for use in an electron beam (EB) lithography.
(b) Description of the Related Art
Along with the development in higher integration of semiconductor devices, lithographic techniques are ever directed to finer design-rule patterning. In this situation, X-ray and EB lithographic techniques attract larger attentions instead of the conventional lithographic technique using ultraviolet-ray having a longer wavelength.
In the EB lithography, an objective device pattern is formed by iterative operation of deflecting an electron beam to form a pattern on a specified area, and then moving the wafer stage to effect forming a pattern on a different area of the wafer. The deflection of the electron beam is conducted based on the writing data obtained beforehand by conversion of the design data of the semiconductor device.
In a new-developed EB technique called cell projection type patterning, iterative patterns having an area of a several-micrometers square is formed on a mask after extraction of the data from a device pattern, followed by projection of the iterative patterns on the semiconductor device at a time, thereby realizing depiction of a plurality of patterns on a specified area of the wafer at a higher rate.
The EB technique including the new-developed cell projection type patterning, however, has yet an insufficient throughput due to the consecutive depiction of the patterns, irrespective whether these patterns are formed by a single pattern basis or a single area basis.
In the circumstances as described above, a new electron projection lithographic (EPL) technique is developed for solving the above problem while taking advantage of the EB lithographic technique having a higher resolution.
The new-developed EPL technique is such that a projection pattern is formed on a mask while magnifying the device pattern at a specified ratio, as in the case of the conventional photolithographic technique, to obtain an EPL mask. The EPL mask is different from the photolithographic mask in that the EPL mask passes the electron beam therethrough, which necessitates use of a stencil mask wherein pattern openings are formed in a silicon substrate, or a membrane mask wherein a plurality of shield stripes made of a metal are formed on a SiC or SiN thin film, instead of the quartz mask. In the EPL technique, the mask is separated into a plurality of one-shot areas each called “sub-field”, within which an EPL system can project a pattern with a single shot of electron beams.
FIG. 1A
shows an example of the stencil mask, generally designated by numeral
13
, including a plurality of sub-fields
12
. The stencil mask
13
includes a support grid
14
having a plurality of cell openings each receiving therein a sub-field
12
, and a silicon substrate
15
adhered onto the support grid
14
and including a plurality of stencil openings
16
received in each of the cell openings of the support grid
14
. Referring to
FIG. 1B
, the sub-field
12
of the EPL mask
13
is extracted from the EPL pattern
11
of the design data.
In general, in the case of the EPL mask implemented by a stencil mask, it is difficult to form a particular pattern opening in the silicon substrate if the particular pattern opening involves a lower mechanical strength of the mask. The lower mechanical strength arises in the case of, for example, an endless pattern such as a donut pattern or a plurality of stripe patterns juxtaposed. For realizing such a specific pattern opening causing a lower mechanical strength, the EPL mask has a particular structure such as having a reinforcement therein.
The particular pattern is generally formed on a pair of complementary masks each mounting thereon one of a pair of patterns obtained by dividing the original particular pattern and capable of being formed as a stencil opening without degrading the mechanical strength.
Examples of the complementary mask patterns includes a first type such as shown in
FIG. 2A
wherein a full-chip data is divided into a plurality of sub-field data
12
, which are formed on a pair of complementary masks A and B, and a second type such as shown in
FIG. 2B
wherein a full-chip data is divided into a plurality of sub-field data
12
, which are formed on a single mask M mounting thereon mask pattern data A and B. That is, the pair of complementary mask patterns A and B may be formed on a pair of masks or a single mask depending on the type. In this text, the mask or masks mounting thereon a pair of complementary mask patterns A and B may be referred to as a pair of complementary masks A and B irrespective whether the mask patterns A and B are formed on a pair of complementary masks A and B or a single mask M.
Referring to
FIG. 3
showing a typical process for forming a pair of complementary masks A and B, the typical process includes a first step S
301
, wherein the full-chip data obtained from the design data is subjected to a proximity effect correction to resize or reshape the pattern, a second step S
302
, wherein the corrected data is divided into a plurality of sub-field data each having a 1.0 mm×1.0 mm square size, a third step S
303
, wherein each sub-field data is subjected to pattern extraction for extracting one or more particular pattern data, such as donut data, and dividing the extracted particular pattern data into a plurality of rectangular pattern data, a fourth step S
304
, wherein the rectangular pattern data are distributed to a pair of complementary masks A and B to output mask data, and a fifth step S
305
, wherein a pair of EPL complementary masks A and B are formed based on the mask data.
In the conventional process as described above, if the sub-field data are distributed to the pair of complementary masks A and B while noticing only the particular pattern data such as donut pattern data, an inequality of the opening area or the pattern density of the stencil mask may arise between the mask A and the mask B. In general, the EB lithography using a pair of masks having different opening areas or different pattern densities causes different spatial charge effects or different resist heating for the masks A and B, generating variances in the focal depth and the amount of heat reserve between the masks A and B. This results in variances in the dimensions, degradation in the accuracy and thus defects of the resultant patterns on the semiconductor devices. The difference in the pattern density between the complementary masks A and B also degrades the accuracy of the mask processing, especially in the etching for the stencil openings in the silicon substrate, thereby generating variances in the mask dimensions.
It is attempted in the prior art to solve the above problem caused by the difference in the pattern density between the EPL masks. Patent Publication JP-A-1999-354422 describes an example of such an attempt, wherein some patterns among a plurality of patterns located in a higher pattern-density mask and each having a size larger than a specified size are extracted, and each of the extracted patterns is provided with a non-exposure pattern having a size smaller than a critical resolution of an optical system. In other words, by removing a part of the pattern in a small amount, which does not directly affect the exposed pattern, the difference in the pattern density between the masks is alleviated.
The technique described in the above publication, however, uses a complicated technique such as reshaping of the patterns, and also involves a restriction on the size of the non-exposure pattern and thus an limited equality to be obtained. Thus, the problem in the conventional technique is not effectively solved by the publication.
Another technique attempted is such that the design data is divided into a plurality of mesh patterns each having a specific size, such as shown in
FIG. 4A
, which are t
Takada Kenichi
Yamada Yasuhisa
Kik Phallaka
NEC Corporation
Smith Matthew
Sughrue & Mion, PLLC
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