Method for manufacturing a multi-layer gate electrode for a MOS

Details Method for manufacturing a multi-layer gate electrode for a MOS Method for manufacturing a multi-layer gate electrode for a MOS

1991-04-29

1992-11-17

Quach, T. N.

Fishing, trapping, and vermin destroying

437 41, 437190, 437192, 437193, H01L 21283, H01L 21335

Patent

active

051643332

ABSTRACT:
A multi-layer gate electrode is provided to prevent dopant depletion of a polysilicon in the manufacture of the electrode containing doped polysilicon and metal silicide. First, a multi-layer structure is produced containing a doped polysilicon structure, a diffusion barrier structure and a silicon structure. After deposition of a metal layer covering the multi-layer structure, a metal silicide structure is produced from the silicon structure and the metal layer in a tempering process. The diffusion barrier structure thereby prevents diffusion of dopant out of the polysilicon structure into the metal silicide structure. This may be used in a salicide process.

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