Method for manufacturing a mask read only memory device

Details Method for manufacturing a mask read only memory device Method for manufacturing a mask read only memory device

1991-11-15

1993-04-06

Thomas, Tom

Fishing, trapping, and vermin destroying

437 45, 437 48, H01L 2170

Patent

active

052003558

ABSTRACT:
A method for manufacturing highly integrated NAND and NOR logic mask read only memory (MROM) devices is disclosed. Over the top surface of a semiconductor substrate, where a first polysilicon layer is formed, a pattern of a gate electrode is formed along a word line in the order of odd numbers or even numbers. Next, an insulation layer having a thickness of a submicron range is formed over the top surface of the substrate. And then a photoresist is covered and an etch back process is performed. Thereafter, the exposed insulation layer caused by the etch back process and the polysilicon layer are selectively etched to form a word line spacing corresponding to a thickness of the insulation layer. Thus, spacing between adjacent word lines can be minimized and a process margin can be sufficiently ensured.

REFERENCES:
patent: 4255210 (1981-03-01), Okuyama et al.
patent: 4359817 (1982-11-01), Dickman et al.
patent: 4364167 (1982-12-01), Donley
patent: 4365405 (1982-12-01), Dickman et al.
patent: 4608748 (1986-09-01), Noguchi et al.

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