Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1996-10-07
1999-03-09
Everhart, Caridad
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438700, 438633, 438623, H01L 21441
Patent
active
058800182
ABSTRACT:
An interconnect structure having a dielectric layer with low dielectric constant is formed within an integrated circuit. In one embodiment of the invention, portions of a silicon dioxide layer (18) lying adjacent to a conductive interconnect (21) are removed to expose portions of a silicon nitride etch stop layer (16). A dielectric layer (22) having a low dielectric constant is then formed overlying the conductive interconnect (21) and the exposed portions of the silicon nitride etch stop layer (16). A portion of the dielectric layer (22) is then removed to expose the top surface of the conductive interconnect (21) to leave portions of the dielectric layer (22) between adjacent conductive interconnects (21). The resulting interconnect structure has reduced cross-talk between conductive interconnects (21) while avoiding prior art disadvantages of reduced thermal dissipation and increased mechanical stress.
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Partial European Search Report and Annex, EP 97 11 6851.
Boeck Bruce Allen
Sparks Terry Grant
Wetzel Jeff Thomas
Cooper Kent J.
Everhart Caridad
Motorola Inc.
Witek Keith E.
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